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-rw-r--r--src/peripheral/mod.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index 235dbe3..d04a320 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -1005,6 +1005,8 @@ impl Cbp {
}
/// D-cache invalidate by set-way
+ ///
+ /// `set` is masked to be between 0 and 3, and `way` between 0 and 511.
#[inline(always)]
pub fn dcisw(&self, set: u16, way: u16) {
// The ARMv7-M Architecture Reference Manual, as of Revision E.b, says these set/way
@@ -1035,6 +1037,8 @@ impl Cbp {
}
/// D-cache clean by set-way
+ ///
+ /// `set` is masked to be between 0 and 3, and `way` between 0 and 511.
#[inline(always)]
pub fn dccsw(&self, set: u16, way: u16) {
// See comment for dcisw() about the format here
@@ -1051,6 +1055,8 @@ impl Cbp {
}
/// D-cache clean and invalidate by set-way
+ ///
+ /// `set` is masked to be between 0 and 3, and `way` between 0 and 511.
#[inline(always)]
pub fn dccisw(&self, set: u16, way: u16) {
// See comment for dcisw() about the format here