6 files changed, 11 insertions, 5 deletions
diff --git a/src/exception.rs b/src/exception.rs
index f5b52f6..61b7415 100644
--- a/src/exception.rs
+++ b/src/exception.rs
@@ -190,6 +190,7 @@ where
 }
 
 /// Registers stacked during an exception
+#[derive(Clone, Copy, Debug)]
 #[repr(C)]
 pub struct StackedRegisters {
     /// (General purpose) Register 0
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index 70653af..67ed026 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -51,6 +51,7 @@ pub const TPIU: Peripheral<Tpiu> = unsafe { Peripheral::new(0xE004_0000) };
 // TODO stand-alone registers: ICTR, ACTLR and STIR
 
 /// A peripheral
+#[derive(Debug)]
 pub struct Peripheral<T>
 where
     T: 'static,
@@ -425,6 +426,7 @@ pub struct Scb {
 }
 
 /// FPU access mode
+#[derive(Clone, Copy, Debug)]
 pub enum FpuAccessMode {
     /// FPU is not accessible
     Disabled,
@@ -489,6 +491,7 @@ pub struct Syst {
 }
 
 /// SysTick clock source
+#[derive(Clone, Copy, Debug)]
 pub enum SystClkSource {
     /// Core-provided clock
     Core,
diff --git a/src/register/apsr.rs b/src/register/apsr.rs
index 338c684..d966de0 100644
--- a/src/register/apsr.rs
+++ b/src/register/apsr.rs
@@ -1,6 +1,7 @@
 //! Application Program Status Register
 
 /// Application Program Status Register
+#[derive(Clone, Copy, Debug)]
 pub struct Apsr {
     bits: u32,
 }
diff --git a/src/register/control.rs b/src/register/control.rs
index 62ebff6..d5cb8ec 100644
--- a/src/register/control.rs
+++ b/src/register/control.rs
@@ -1,6 +1,7 @@
 //! Control register
 
 /// Control register
+#[derive(Clone, Copy, Debug)]
 pub struct Control {
     bits: u32,
 }
@@ -40,7 +41,7 @@ impl Control {
 }
 
 /// Thread mode privilege level
-#[derive(Clone, Copy, Eq, PartialEq)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Npriv {
     /// Privileged
     Privileged,
@@ -61,7 +62,7 @@ impl Npriv {
 }
 
 /// Currently active stack pointer
-#[derive(Clone, Copy, Eq, PartialEq)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Spsel {
     /// MSP is the current stack pointer
     Msp,
@@ -82,7 +83,7 @@ impl Spsel {
 }
 
 /// Whether context floating-point is currently active
-#[derive(Clone, Copy, Eq, PartialEq)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Fpca {
     /// Floating-point context active.
     Active,
diff --git a/src/register/faultmask.rs b/src/register/faultmask.rs
index 5a06b37..7a0d06c 100644
--- a/src/register/faultmask.rs
+++ b/src/register/faultmask.rs
@@ -1,7 +1,7 @@
 //! Fault Mask Register
 
 /// All exceptions are ...
-#[derive(Clone, Copy, Eq, PartialEq)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Faultmask {
     /// Active
     Active,
diff --git a/src/register/primask.rs b/src/register/primask.rs
index 1e24b73..313693f 100644
--- a/src/register/primask.rs
+++ b/src/register/primask.rs
@@ -1,7 +1,7 @@
 //! Priority mask register
 
 /// All exceptions with configurable priority are ...
-#[derive(Clone, Copy, Eq, PartialEq)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Primask {
     /// Active
     Active,