diff options
| -rw-r--r-- | src/peripheral/icb.rs | 4 | ||||
| -rw-r--r-- | src/register/fpscr.rs | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/peripheral/icb.rs b/src/peripheral/icb.rs index 77ffd5d..9b29655 100644 --- a/src/peripheral/icb.rs +++ b/src/peripheral/icb.rs @@ -1,6 +1,8 @@ //! Implementation Control Block -use volatile_register::{RO, RW}; +#[cfg(any(armv7m, armv8m, target_arch = "x86_64"))] +use volatile_register::RO; +use volatile_register::RW; /// Register block #[repr(C)] diff --git a/src/register/fpscr.rs b/src/register/fpscr.rs index 569d3a7..2ca00e1 100644 --- a/src/register/fpscr.rs +++ b/src/register/fpscr.rs @@ -148,10 +148,10 @@ impl Fpscr { pub fn set_rmode(&mut self, rmode: RMode) { let mask = 3 << 22; match rmode { - RMode::Nearest => self.bits = self.bits & !mask, + RMode::Nearest => self.bits &= !mask, RMode::PlusInfinity => self.bits = (self.bits & !mask) | (1 << 22), RMode::MinusInfinity => self.bits = (self.bits & !mask) | (2 << 22), - RMode::Zero => self.bits = self.bits | mask, + RMode::Zero => self.bits |= mask, } } |