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-rw-r--r--src/peripheral/cpuid.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/peripheral/cpuid.rs b/src/peripheral/cpuid.rs
index 3cb0079..32d0baf 100644
--- a/src/peripheral/cpuid.rs
+++ b/src/peripheral/cpuid.rs
@@ -131,6 +131,7 @@ impl CPUID {
/// caches that are controlled by the processor.
///
/// This is the `IminLine` field of the CTR register.
+ #[inline(always)]
pub fn cache_iminline() -> u32 {
const CTR_IMINLINE_POS: u32 = 0;
const CTR_IMINLINE_MASK: u32 = 0xF << CTR_IMINLINE_POS;