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-rw-r--r--src/peripheral/dcb.rs4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs
index 5689cb4..056150b 100644
--- a/src/peripheral/dcb.rs
+++ b/src/peripheral/dcb.rs
@@ -25,6 +25,10 @@ impl DCB {
/// `peripheral::DWT` cycle counter to work properly.
/// As by STM documentation, this flag is not reset on
/// soft-reset, only on power reset.
+ ///
+ /// Note: vendor-specific registers may have to be set to completely
+ /// enable tracing. For example, on the STM32F401RE, `TRACE_MODE`
+ /// and `TRACE_IOEN` must be configured in `DBGMCU_CR` register.
#[inline]
pub fn enable_trace(&mut self) {
// set bit 24 / TRCENA