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-rw-r--r--src/delay.rs119
-rw-r--r--src/lib.rs28
-rw-r--r--src/peripheral/mod.rs2
-rw-r--r--src/peripheral/nvic.rs4
-rw-r--r--src/prelude.rs3
5 files changed, 153 insertions, 3 deletions
diff --git a/src/delay.rs b/src/delay.rs
new file mode 100644
index 0000000..051151f
--- /dev/null
+++ b/src/delay.rs
@@ -0,0 +1,119 @@
+//! A delay driver based on SysTick.
+
+use crate::peripheral::{syst::SystClkSource, SYST};
+use embedded_hal::blocking::delay::{DelayMs, DelayUs};
+
+/// System timer (SysTick) as a delay provider.
+pub struct Delay {
+ syst: SYST,
+ ahb_frequency: u32,
+}
+
+impl Delay {
+ /// Configures the system timer (SysTick) as a delay provider.
+ ///
+ /// `ahb_frequency` is a frequency of the AHB bus in Hz.
+ #[inline]
+ pub fn new(mut syst: SYST, ahb_frequency: u32) -> Self {
+ syst.set_clock_source(SystClkSource::Core);
+
+ Delay { syst, ahb_frequency }
+ }
+
+ /// Releases the system timer (SysTick) resource.
+ #[inline]
+ pub fn free(self) -> SYST {
+ self.syst
+ }
+
+ fn _delay_us(&mut self, us: u32) {
+ let ticks = (us as u64) * (self.ahb_frequency as u64) / 1_000_000;
+
+ let full_cycles = ticks >> 24;
+ if full_cycles > 0 {
+ self.syst.set_reload(0xffffff);
+ self.syst.clear_current();
+ self.syst.enable_counter();
+
+ for _ in 0..full_cycles {
+ while !self.syst.has_wrapped() {}
+ }
+ }
+
+ let ticks = (ticks & 0xffffff) as u32;
+ if ticks > 1 {
+ self.syst.set_reload(ticks - 1);
+ self.syst.clear_current();
+ self.syst.enable_counter();
+
+ while !self.syst.has_wrapped() {}
+ }
+
+ self.syst.disable_counter();
+ }
+}
+
+impl DelayMs<u32> for Delay {
+ #[inline]
+ fn delay_ms(&mut self, mut ms: u32) {
+ // 4294967 is the highest u32 value which you can multiply by 1000 without overflow
+ while ms > 4294967 {
+ self.delay_us(4294967000u32);
+ ms -= 4294967;
+ }
+ self.delay_us(ms * 1_000);
+ }
+}
+
+// This is a workaround to allow `delay_ms(42)` construction without specifying a type.
+impl DelayMs<i32> for Delay {
+ #[inline(always)]
+ fn delay_ms(&mut self, ms: i32) {
+ assert!(ms >= 0);
+ self.delay_ms(ms as u32);
+ }
+}
+
+impl DelayMs<u16> for Delay {
+ #[inline(always)]
+ fn delay_ms(&mut self, ms: u16) {
+ self.delay_ms(u32::from(ms));
+ }
+}
+
+impl DelayMs<u8> for Delay {
+ #[inline(always)]
+ fn delay_ms(&mut self, ms: u8) {
+ self.delay_ms(u32::from(ms));
+ }
+}
+
+impl DelayUs<u32> for Delay {
+ #[inline]
+ fn delay_us(&mut self, us: u32) {
+ self._delay_us(us);
+ }
+}
+
+// This is a workaround to allow `delay_us(42)` construction without specifying a type.
+impl DelayUs<i32> for Delay {
+ #[inline(always)]
+ fn delay_us(&mut self, us: i32) {
+ assert!(us >= 0);
+ self.delay_us(us as u32);
+ }
+}
+
+impl DelayUs<u16> for Delay {
+ #[inline(always)]
+ fn delay_us(&mut self, us: u16) {
+ self.delay_us(u32::from(us))
+ }
+}
+
+impl DelayUs<u8> for Delay {
+ #[inline(always)]
+ fn delay_us(&mut self, us: u8) {
+ self.delay_us(u32::from(us))
+ }
+}
diff --git a/src/lib.rs b/src/lib.rs
index 89f420d..723816a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -24,6 +24,32 @@
//!
//! The disadvantage is that `inline-asm` requires a nightly toolchain.
//!
+//! ## `cm7-r0p1`
+//!
+//! This feature enables workarounds for errata found on Cortex-M7 chips with revision r0p1. Some
+//! functions in this crate only work correctly on those chips if this Cargo feature is enabled
+//! (the functions are documented accordingly).
+//!
+//! ## `linker-plugin-lto`
+//!
+//! This feature links against prebuilt assembly blobs that are compatible with [Linker-Plugin LTO].
+//! This allows inlining assembly routines into the caller, even without the `inline-asm` feature,
+//! and works on stable Rust (but note the drawbacks below!).
+//!
+//! If you want to use this feature, you need to be aware of a few things:
+//!
+//! - You need to make sure that `-Clinker-plugin-lto` is passed to rustc. Please refer to the
+//! [Linker-Plugin LTO] documentation for details.
+//!
+//! - You have to use a Rust version whose LLVM version is compatible with the toolchain in
+//! `asm-toolchain`.
+//!
+//! - Due to a [Rust bug][rust-lang/rust#75940], this option does not work with optimization
+//! levels `s` and `z`.
+//!
+//! [Linker-Plugin LTO]: https://doc.rust-lang.org/stable/rustc/linker-plugin-lto.html
+//! [rust-lang/rust#75940]: https://github.com/rust-lang/rust/issues/75940
+//!
//! # Minimum Supported Rust Version (MSRV)
//!
//! This crate is guaranteed to compile on stable Rust 1.31 and up. It *might*
@@ -61,10 +87,12 @@ mod macros;
pub mod asm;
#[cfg(armv8m)]
pub mod cmse;
+pub mod delay;
pub mod interrupt;
#[cfg(all(not(armv6m), not(armv8m_base)))]
pub mod itm;
pub mod peripheral;
+pub mod prelude;
pub mod register;
pub use crate::peripheral::Peripherals;
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index cae1133..961f31d 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -55,8 +55,6 @@
//!
//! - ARMv7-M Architecture Reference Manual (Issue E.b) - Chapter B3
-// TODO stand-alone register: STIR
-
use core::marker::PhantomData;
use core::ops;
diff --git a/src/peripheral/nvic.rs b/src/peripheral/nvic.rs
index a2f85f4..4332707 100644
--- a/src/peripheral/nvic.rs
+++ b/src/peripheral/nvic.rs
@@ -79,9 +79,11 @@ impl NVIC {
///
/// Writing a value to the INTID field is the same as manually pending an interrupt by setting
/// the corresponding interrupt bit in an Interrupt Set Pending Register. This is similar to
- /// `set_pending`.
+ /// [`NVIC::pend`].
///
/// This method is not available on ARMv6-M chips.
+ ///
+ /// [`NVIC::pend`]: #method.pend
#[cfg(not(armv6m))]
#[inline]
pub fn request<I>(&mut self, interrupt: I)
diff --git a/src/prelude.rs b/src/prelude.rs
new file mode 100644
index 0000000..bc47cc0
--- /dev/null
+++ b/src/prelude.rs
@@ -0,0 +1,3 @@
+//! Prelude
+
+pub use embedded_hal::prelude::*;