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-rw-r--r--src/lib.rs2
-rw-r--r--src/peripheral/cbp.rs2
-rw-r--r--src/peripheral/fpb.rs2
-rw-r--r--src/peripheral/fpu.rs2
-rw-r--r--src/peripheral/itm.rs2
-rw-r--r--src/peripheral/mod.rs22
-rw-r--r--src/peripheral/tpiu.rs2
7 files changed, 19 insertions, 15 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 276551c..aedb95a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -62,7 +62,7 @@ pub mod asm;
#[cfg(armv8m)]
pub mod cmse;
pub mod interrupt;
-#[cfg(not(armv6m))]
+#[cfg(all(not(armv6m), not(armv8m_base)))]
pub mod itm;
pub mod peripheral;
pub mod register;
diff --git a/src/peripheral/cbp.rs b/src/peripheral/cbp.rs
index 6a1defd..5aee544 100644
--- a/src/peripheral/cbp.rs
+++ b/src/peripheral/cbp.rs
@@ -1,6 +1,6 @@
//! Cache and branch predictor maintenance operations
//!
-//! *NOTE* Available only on ARMv7-M (`thumbv7*m-none-eabi*`)
+//! *NOTE* Not available on Armv6-M.
use volatile_register::WO;
diff --git a/src/peripheral/fpb.rs b/src/peripheral/fpb.rs
index 215d4ff..b86b8b2 100644
--- a/src/peripheral/fpb.rs
+++ b/src/peripheral/fpb.rs
@@ -1,6 +1,6 @@
//! Flash Patch and Breakpoint unit
//!
-//! *NOTE* Available only on ARMv7-M (`thumbv7*m-none-eabi*`)
+//! *NOTE* Not available on Armv6-M.
use volatile_register::{RO, RW, WO};
diff --git a/src/peripheral/fpu.rs b/src/peripheral/fpu.rs
index c4e8a1d..9a047d8 100644
--- a/src/peripheral/fpu.rs
+++ b/src/peripheral/fpu.rs
@@ -1,6 +1,6 @@
//! Floating Point Unit
//!
-//! *NOTE* Available only on ARMv7E-M (`thumbv7em-none-eabihf`)
+//! *NOTE* Available only on targets with a Floating Point Unit (FPU) extension.
use volatile_register::{RO, RW};
diff --git a/src/peripheral/itm.rs b/src/peripheral/itm.rs
index 30c7e47..0b63524 100644
--- a/src/peripheral/itm.rs
+++ b/src/peripheral/itm.rs
@@ -1,6 +1,6 @@
//! Instrumentation Trace Macrocell
//!
-//! *NOTE* Available only on ARMv7-M (`thumbv7*m-none-eabi*`)
+//! *NOTE* Not available on Armv6-M and Armv8-M Baseline.
use core::cell::UnsafeCell;
use core::ptr;
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index 7af4b90..04fae31 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -72,7 +72,7 @@ pub mod fpb;
// NOTE(target_arch) is for documentation purposes
#[cfg(any(has_fpu, target_arch = "x86_64"))]
pub mod fpu;
-#[cfg(not(armv6m))]
+#[cfg(all(not(armv6m), not(armv8m_base)))]
pub mod itm;
pub mod mpu;
pub mod nvic;
@@ -91,7 +91,8 @@ mod test;
/// Core peripherals
#[allow(non_snake_case)]
pub struct Peripherals {
- /// Cache and branch predictor maintenance operations (not present on Cortex-M0 variants)
+ /// Cache and branch predictor maintenance operations.
+ /// Not available on Armv6-M.
pub CBP: CBP,
/// CPUID
@@ -103,13 +104,15 @@ pub struct Peripherals {
/// Data Watchpoint and Trace unit
pub DWT: DWT,
- /// Flash Patch and Breakpoint unit (not present on Cortex-M0 variants)
+ /// Flash Patch and Breakpoint unit.
+ /// Not available on Armv6-M.
pub FPB: FPB,
- /// Floating Point Unit (only present on `thumbv7em-none-eabihf`)
+ /// Floating Point Unit.
pub FPU: FPU,
- /// Instrumentation Trace Macrocell (not present on Cortex-M0 variants)
+ /// Instrumentation Trace Macrocell.
+ /// Not available on Armv6-M and Armv8-M Baseline.
pub ITM: ITM,
/// Memory Protection Unit
@@ -127,7 +130,8 @@ pub struct Peripherals {
/// SysTick: System Timer
pub SYST: SYST,
- /// Trace Port Interface Unit (not present on Cortex-M0 variants)
+ /// Trace Port Interface Unit.
+ /// Not available on Armv6-M.
pub TPIU: TPIU,
// Private field making `Peripherals` non-exhaustive. We don't use `#[non_exhaustive]` so we
@@ -367,7 +371,7 @@ pub struct ITM {
unsafe impl Send for ITM {}
-#[cfg(not(armv6m))]
+#[cfg(all(not(armv6m), not(armv8m_base)))]
impl ITM {
/// Returns a pointer to the register block
#[inline(always)]
@@ -376,7 +380,7 @@ impl ITM {
}
}
-#[cfg(not(armv6m))]
+#[cfg(all(not(armv6m), not(armv8m_base)))]
impl ops::Deref for ITM {
type Target = self::itm::RegisterBlock;
@@ -386,7 +390,7 @@ impl ops::Deref for ITM {
}
}
-#[cfg(not(armv6m))]
+#[cfg(all(not(armv6m), not(armv8m_base)))]
impl ops::DerefMut for ITM {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
diff --git a/src/peripheral/tpiu.rs b/src/peripheral/tpiu.rs
index 4115bb3..11cb79e 100644
--- a/src/peripheral/tpiu.rs
+++ b/src/peripheral/tpiu.rs
@@ -1,6 +1,6 @@
//! Trace Port Interface Unit;
//!
-//! *NOTE* Available only on ARMv7-M (`thumbv7*m-none-eabi*`)
+//! *NOTE* Not available on Armv6-M.
use volatile_register::{RO, RW, WO};