1 files changed, 54 insertions, 0 deletions
diff --git a/testsuite/src/main.rs b/testsuite/src/main.rs
new file mode 100644
index 0000000..46ab629
--- /dev/null
+++ b/testsuite/src/main.rs
@@ -0,0 +1,54 @@
+#![no_main]
+#![no_std]
+
+extern crate cortex_m_rt;
+
+#[cfg(target_env = "")] // appease clippy
+#[panic_handler]
+fn panic(info: &core::panic::PanicInfo) -> ! {
+    cortex_m::interrupt::disable();
+    minitest::log!("{}", info);
+    minitest::fail()
+}
+
+#[minitest::tests]
+mod tests {
+    use minitest::log;
+
+    #[init]
+    fn init() -> cortex_m::Peripherals {
+        log!("Hello world!");
+        cortex_m::Peripherals::take().unwrap()
+    }
+
+    #[test]
+    fn double_take() {
+        assert!(cortex_m::Peripherals::take().is_none());
+    }
+
+    #[test]
+    #[cfg(not(feature = "semihosting"))] // QEMU does not model the cycle counter
+    fn cycle_count(p: &mut cortex_m::Peripherals) {
+        #[cfg(not(armv6m))]
+        {
+            use cortex_m::peripheral::DWT;
+
+            assert!(p.DWT.has_cycle_counter());
+
+            p.DCB.enable_trace();
+            p.DWT.disable_cycle_counter();
+
+            const TEST_COUNT: u32 = 0x5555_AAAA;
+            p.DWT.set_cycle_count(TEST_COUNT);
+            assert_eq!(DWT::cycle_count(), TEST_COUNT);
+
+            p.DWT.enable_cycle_counter();
+            assert!(DWT::cycle_count() > TEST_COUNT);
+        }
+
+        #[cfg(armv6m)]
+        {
+            assert!(!p.DWT.has_cycle_counter());
+        }
+    }
+}