From a2edb2250059b9563a78c3bd00a52ceaee4f063f Mon Sep 17 00:00:00 2001 From: Ovidiu Sabou Date: Mon, 8 Feb 2021 23:00:39 +0200 Subject: Prevent underflow when calling delay(n) with n<2 Calling delay(1) causes a very long wait (freeze) otherwise. 86cd463788b97ca3894936101c6cf4f3512f0fbc introduced this behaviour by changing the cycle count from n / 4 + 1 to n / 2 which forces an underflow when n<2. --- asm/inline.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'asm/inline.rs') diff --git a/asm/inline.rs b/asm/inline.rs index ef203cd..a7898c5 100644 --- a/asm/inline.rs +++ b/asm/inline.rs @@ -55,7 +55,7 @@ pub unsafe fn __delay(cyc: u32) { // The loop will normally take 3 to 4 CPU cycles per iteration, but superscalar cores // (eg. Cortex-M7) can potentially do it in 2, so we use that as the lower bound, since delaying // for more cycles is okay. - let real_cyc = cyc / 2; + let real_cyc = 1 + cyc / 2; asm!( // Use local labels to avoid R_ARM_THM_JUMP8 relocations which fail on thumbv6m. "1:", -- cgit v1.2.3 From 7b66016c1d680f78f56403c056dbe6ca3ebc0e23 Mon Sep 17 00:00:00 2001 From: Ovidiu Sabou Date: Tue, 9 Feb 2021 10:21:38 +0200 Subject: Extra comment --- asm/inline.rs | 1 + 1 file changed, 1 insertion(+) (limited to 'asm/inline.rs') diff --git a/asm/inline.rs b/asm/inline.rs index a7898c5..5887baf 100644 --- a/asm/inline.rs +++ b/asm/inline.rs @@ -55,6 +55,7 @@ pub unsafe fn __delay(cyc: u32) { // The loop will normally take 3 to 4 CPU cycles per iteration, but superscalar cores // (eg. Cortex-M7) can potentially do it in 2, so we use that as the lower bound, since delaying // for more cycles is okay. + // Add 1 to prevent an integer underflow which would cause a long freeze let real_cyc = 1 + cyc / 2; asm!( // Use local labels to avoid R_ARM_THM_JUMP8 relocations which fail on thumbv6m. -- cgit v1.2.3