From 716398ce542798aff238abc6a978d3b64a1c0dd4 Mon Sep 17 00:00:00 2001
From: Jorge Aparicio <jorge@japaric.io>
Date: Fri, 11 May 2018 18:08:36 +0200
Subject: fix build on ARMv6-M

---
 src/peripheral/scb.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index 70144c1..e31c902 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -9,7 +9,8 @@ use super::cpuid::CsselrCacheType;
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 use super::CPUID;
 #[cfg(any(armv7m, has_fpu, target_arch = "x86_64"))]
-use super::{CBP, SCB};
+use super::CBP;
+use super::SCB;
 
 /// Register block
 #[repr(C)]
-- 
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