From fe0461f356ea25e27ca59d2c59094113bb167604 Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Sat, 4 Mar 2017 20:57:48 -0500 Subject: fix cfg: thumbv6m -> armv6m --- src/peripheral/nvic.rs | 4 ++-- src/register/mod.rs | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/peripheral/nvic.rs b/src/peripheral/nvic.rs index 054a74e..26a9524 100644 --- a/src/peripheral/nvic.rs +++ b/src/peripheral/nvic.rs @@ -3,10 +3,10 @@ use interrupt::Nr; use volatile_register::{RO, RW}; -#[cfg(thumbv6m)] +#[cfg(armv6m)] const PRIORITY_BITS: u8 = 2; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] const PRIORITY_BITS: u8 = 4; /// Registers diff --git a/src/register/mod.rs b/src/register/mod.rs index 0ec5720..e3321a6 100644 --- a/src/register/mod.rs +++ b/src/register/mod.rs @@ -27,12 +27,12 @@ //! - Cortex-M* Devices Generic User Guide - Section 2.1.3 Core registers pub mod apsr; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod basepri; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod basepri_max; pub mod control; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod faultmask; pub mod lr; pub mod msp; -- cgit v1.2.3