diff options
Diffstat (limited to '')
| -rw-r--r-- | src/mpmc.rs | 9 | ||||
| -rw-r--r-- | src/pool/mod.rs | 9 |
2 files changed, 12 insertions, 6 deletions
diff --git a/src/mpmc.rs b/src/mpmc.rs index ef345f91..a5c327f5 100644 --- a/src/mpmc.rs +++ b/src/mpmc.rs @@ -1,6 +1,7 @@ //! A fixed capacity Multiple-Producer Multiple-Consumer (MPMC) lock-free queue //! -//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M +//! NOTE: This module is not available on targets that do *not* support CAS operations and are not +//! emulated by the [`atomic_polyfill`] crate (e.g., MSP430). //! //! # Example //! @@ -73,8 +74,10 @@ //! //! # Portability //! -//! This module is not exposed to architectures that lack the instructions to implement CAS loops. -//! Those architectures include ARMv6-M (`thumbv6m-none-eabi`) and MSP430 (`msp430-none-elf`). +//! This module requires CAS atomic instructions which are not available on all architectures +//! (e.g. ARMv6-M (`thumbv6m-none-eabi`) and MSP430 (`msp430-none-elf`)). These atomics can be emulated +//! however with [`atomic_polyfill`], which is enabled with the `cas` feature and is enabled by default +//! for `thumbv6m-none-eabi` and `riscv32` targets. MSP430 is currently not supported by [`atomic_polyfill`]. //! //! # References //! diff --git a/src/pool/mod.rs b/src/pool/mod.rs index 15ee5430..65a9c451 100644 --- a/src/pool/mod.rs +++ b/src/pool/mod.rs @@ -1,6 +1,7 @@ //! A heap-less, interrupt-safe, lock-free memory pool (\*) //! -//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M +//! NOTE: This module is not available on targets that do *not* support CAS operations and are not +//! emulated by the [`atomic_polyfill`] crate (e.g., MSP430). //! //! (\*) Currently, the implementation is only lock-free *and* `Sync` on ARMv6, ARMv7-{A,R,M} & ARMv8-M //! devices @@ -59,8 +60,10 @@ //! on the target architecture (see section on ['Soundness'](#soundness) for more information). For //! this reason, `Pool` only implements `Sync` when compiling for some ARM cores. //! -//! Also note that ARMv6-M architecture lacks the primitives for CAS loops so this module does *not* -//! exist for `thumbv6m-none-eabi`. +//! This module requires CAS atomic instructions which are not available on all architectures +//! (e.g. ARMv6-M (`thumbv6m-none-eabi`) and MSP430 (`msp430-none-elf`)). These atomics can be emulated +//! however with [`atomic_polyfill`], which is enabled with the `cas` feature and is enabled by default +//! for `thumbv6m-none-eabi` and `riscv32` targets. MSP430 is currently not supported by [`atomic_polyfill`]. //! //! # Soundness //! |