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author | 2017-07-27 17:08:42 -0500 | |
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committer | 2017-07-27 17:08:42 -0500 | |
commit | d396da59502ef67f624bb4d8927ff8697232f66c (patch) | |
tree | 264e29e59cf4fe119fb82481b9c6949c579e8399 /src | |
parent | ad2a523cf9d39191d54f4dda3c99f22b5bade7de (diff) | |
download | rtic-d396da59502ef67f624bb4d8927ff8697232f66c.tar.gz rtic-d396da59502ef67f624bb4d8927ff8697232f66c.tar.zst rtic-d396da59502ef67f624bb4d8927ff8697232f66c.zip |
make task.$T.enabled optional
and move the logic that differentiates interrupts from exceptions from the crate
to the procedural macro logic
Diffstat (limited to 'src')
-rw-r--r-- | src/lib.rs | 22 |
1 files changed, 0 insertions, 22 deletions
@@ -140,25 +140,3 @@ where let nvic = unsafe { &*cortex_m::peripheral::NVIC.get() }; nvic.set_pending(interrupt); } - -#[allow(non_camel_case_types)] -#[doc(hidden)] -pub enum Exception { - /// System service call via SWI instruction - SVCALL, - /// Pendable request for system service - PENDSV, - /// System tick timer - SYS_TICK, -} - -impl Exception { - #[doc(hidden)] - pub fn nr(&self) -> usize { - match *self { - Exception::SVCALL => 11, - Exception::PENDSV => 14, - Exception::SYS_TICK => 15, - } - } -} |