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-rw-r--r--examples/one-task.rs34
1 files changed, 21 insertions, 13 deletions
diff --git a/examples/one-task.rs b/examples/one-task.rs
index e58d9fcd..38f01354 100644
--- a/examples/one-task.rs
+++ b/examples/one-task.rs
@@ -7,8 +7,9 @@ extern crate cortex_m;
extern crate cortex_m_rtfm as rtfm;
extern crate stm32f103xx;
-use cortex_m::peripheral::SystClkSource;
+use cortex_m::peripheral::syst::SystClkSource;
use rtfm::{app, Threshold};
+use stm32f103xx::GPIOC;
app! {
device: stm32f103xx,
@@ -35,9 +36,8 @@ app! {
// These are the resources this task has access to.
//
- // A resource can be a peripheral like `GPIOC` or a static variable
- // like `ON`
- resources: [GPIOC, ON],
+ // The resources listed here must also appear in `app.resources`
+ resources: [ON],
},
}
}
@@ -47,19 +47,20 @@ fn init(p: init::Peripherals, r: init::Resources) {
r.ON;
// power on GPIOC
- p.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
+ p.device.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
// configure PC13 as output
- p.GPIOC.bsrr.write(|w| w.bs13().set());
- p.GPIOC
+ p.device.GPIOC.bsrr.write(|w| w.bs13().set());
+ p.device
+ .GPIOC
.crh
.modify(|_, w| w.mode13().output().cnf13().push());
// configure the system timer to generate one interrupt every second
- p.SYST.set_clock_source(SystClkSource::Core);
- p.SYST.set_reload(8_000_000); // 1s
- p.SYST.enable_interrupt();
- p.SYST.enable_counter();
+ p.core.SYST.set_clock_source(SystClkSource::Core);
+ p.core.SYST.set_reload(8_000_000); // 1s
+ p.core.SYST.enable_interrupt();
+ p.core.SYST.enable_counter();
}
fn idle() -> ! {
@@ -74,15 +75,22 @@ fn idle() -> ! {
//
// `r` is the set of resources this task has access to. `SYS_TICK::Resources`
// has one field per resource declared in `app!`.
+#[allow(unsafe_code)]
fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
// toggle state
**r.ON = !**r.ON;
if **r.ON {
// set the pin PC13 high
- r.GPIOC.bsrr.write(|w| w.bs13().set());
+ // NOTE(unsafe) atomic write to a stateless register
+ unsafe {
+ (*GPIOC::ptr()).bsrr.write(|w| w.bs13().set());
+ }
} else {
// set the pin PC13 low
- r.GPIOC.bsrr.write(|w| w.br13().reset());
+ // NOTE(unsafe) atomic write to a stateless register
+ unsafe {
+ (*GPIOC::ptr()).bsrr.write(|w| w.br13().reset());
+ }
}
}