8 files changed, 117 insertions, 5 deletions
diff --git a/homogeneous/Cargo.toml b/homogeneous/Cargo.toml
new file mode 100644
index 00000000..210ee2e8
--- /dev/null
+++ b/homogeneous/Cargo.toml
@@ -0,0 +1,17 @@
+[package]
+authors = ["Jorge Aparicio <jorge@japaric.io>"]
+edition = "2018"
+name = "homogeneous"
+# this crate is only used for testing
+publish = false
+version = "0.0.0-alpha.0"
+
+[dependencies]
+bare-metal = "0.2.4"
+
+[dependencies.cortex-m-rtfm]
+path = ".."
+features = ["homogeneous"]
+
+[dev-dependencies]
+panic-halt = "0.2.0"
diff --git a/homogeneous/README.md b/homogeneous/README.md
new file mode 100644
index 00000000..17e9c6e1
--- /dev/null
+++ b/homogeneous/README.md
@@ -0,0 +1 @@
+This directory contains *homogeneous* multi-core compile pass tests.
diff --git a/mc/examples/smallest.rs b/homogeneous/examples/smallest.rs
index 792935a8..b99476c7 100644
--- a/mc/examples/smallest.rs
+++ b/homogeneous/examples/smallest.rs
@@ -3,5 +3,5 @@
 
 use panic_halt as _;
 
-#[rtfm::app(cores = 2, device = mc)]
+#[rtfm::app(cores = 2, device = homogeneous)]
 const APP: () = {};
diff --git a/mc/examples/x-init-2.rs b/homogeneous/examples/x-init-2.rs
index ff48b110..f51e2f6e 100644
--- a/mc/examples/x-init-2.rs
+++ b/homogeneous/examples/x-init-2.rs
@@ -7,7 +7,7 @@
 
 use panic_halt as _;
 
-#[rtfm::app(cores = 2, device = mc)]
+#[rtfm::app(cores = 2, device = homogeneous)]
 const APP: () = {
     extern "C" {
         // owned by core #1 but initialized by core #0
diff --git a/mc/examples/x-init.rs b/homogeneous/examples/x-init.rs
index 3f26c5c9..5089e385 100644
--- a/mc/examples/x-init.rs
+++ b/homogeneous/examples/x-init.rs
@@ -7,7 +7,7 @@
 
 use panic_halt as _;
 
-#[rtfm::app(cores = 2, device = mc)]
+#[rtfm::app(cores = 2, device = homogeneous)]
 const APP: () = {
     extern "C" {
         static mut X: u32;
diff --git a/mc/examples/x-schedule.rs b/homogeneous/examples/x-schedule.rs
index 76e70acf..12b5cb80 100644
--- a/mc/examples/x-schedule.rs
+++ b/homogeneous/examples/x-schedule.rs
@@ -3,7 +3,7 @@
 
 use panic_halt as _;
 
-#[rtfm::app(cores = 2, device = mc, monotonic = mc::MT)]
+#[rtfm::app(cores = 2, device = homogeneous, monotonic = homogeneous::MT)]
 const APP: () = {
     #[init(core = 0, spawn = [ping])]
     fn init(c: init::Context) {
diff --git a/mc/examples/x-spawn.rs b/homogeneous/examples/x-spawn.rs
index 749918fd..a76ac61c 100644
--- a/mc/examples/x-spawn.rs
+++ b/homogeneous/examples/x-spawn.rs
@@ -3,7 +3,7 @@
 
 use panic_halt as _;
 
-#[rtfm::app(cores = 2, device = mc)]
+#[rtfm::app(cores = 2, device = homogeneous)]
 const APP: () = {
     #[init(core = 0, spawn = [foo])]
     fn init(c: init::Context) {
diff --git a/homogeneous/src/lib.rs b/homogeneous/src/lib.rs
new file mode 100644
index 00000000..a4f0ec57
--- /dev/null
+++ b/homogeneous/src/lib.rs
@@ -0,0 +1,94 @@
+//! Fake multi-core PAC
+
+#![no_std]
+
+use core::{
+    cmp::Ordering,
+    ops::{Add, Sub},
+};
+
+use bare_metal::Nr;
+use rtfm::Monotonic;
+
+// both cores have the exact same interrupts
+pub use Interrupt_0 as Interrupt_1;
+
+// Fake priority bits
+pub const NVIC_PRIO_BITS: u8 = 3;
+
+pub fn xpend(_core: u8, _interrupt: impl Nr) {}
+
+/// Fake monotonic timer
+pub struct MT;
+
+unsafe impl Monotonic for MT {
+    type Instant = Instant;
+
+    fn ratio() -> u32 {
+        1
+    }
+
+    unsafe fn reset() {
+        (0xE0001004 as *mut u32).write_volatile(0)
+    }
+
+    fn now() -> Instant {
+        unsafe { Instant((0xE0001004 as *const u32).read_volatile() as i32) }
+    }
+
+    fn zero() -> Instant {
+        Instant(0)
+    }
+}
+
+#[derive(Clone, Copy, Eq, PartialEq)]
+pub struct Instant(i32);
+
+impl Add<u32> for Instant {
+    type Output = Instant;
+
+    fn add(self, rhs: u32) -> Self {
+        Instant(self.0.wrapping_add(rhs as i32))
+    }
+}
+
+impl Sub for Instant {
+    type Output = u32;
+
+    fn sub(self, rhs: Self) -> u32 {
+        self.0.checked_sub(rhs.0).unwrap() as u32
+    }
+}
+
+impl Ord for Instant {
+    fn cmp(&self, rhs: &Self) -> Ordering {
+        self.0.wrapping_sub(rhs.0).cmp(&0)
+    }
+}
+
+impl PartialOrd for Instant {
+    fn partial_cmp(&self, rhs: &Self) -> Option<Ordering> {
+        Some(self.cmp(rhs))
+    }
+}
+
+// Fake interrupts
+#[allow(non_camel_case_types)]
+#[derive(Clone, Copy)]
+#[repr(u8)]
+pub enum Interrupt_0 {
+    I0 = 0,
+    I1 = 1,
+    I2 = 2,
+    I3 = 3,
+    I4 = 4,
+    I5 = 5,
+    I6 = 6,
+    I7 = 7,
+}
+
+unsafe impl Nr for Interrupt_0 {
+    fn nr(&self) -> u8 {
+        *self as u8
+    }
+}