Remove prebuilt cortex-m-rt binaries, replace with global_asm

17 files changed, 132 insertions, 186 deletions

diff --git a/.github/bors.toml b/.github/bors.toml
index c12731a..218ec03 100644
--- a/.github/bors.toml
+++ b/.github/bors.toml
@@ -5,7 +5,7 @@ status = [
   "ci-linux (stable)",
   "ci-linux (1.59.0)",
   "rt-ci-linux (stable)",
-  "rt-ci-linux (1.42.0)",
+  "rt-ci-linux (1.59.0)",
   "rt-ci-other-os (macOS-latest)",
   "rt-ci-other-os (windows-latest)",
   "rustfmt",
diff --git a/.github/workflows/rt-ci.yml b/.github/workflows/rt-ci.yml
index 8b95612..f1eee81 100644
--- a/.github/workflows/rt-ci.yml
+++ b/.github/workflows/rt-ci.yml
@@ -11,8 +11,7 @@ jobs:
     continue-on-error: ${{ matrix.experimental || false }}
     strategy:
       matrix:
-        # All generated code should be running on stable now
-        rust: [nightly, stable, 1.42.0]
+        rust: [nightly, stable, 1.59.0]
 
         include:
           # Nightly is only for reference and allowed to fail
diff --git a/cortex-m-rt/CHANGELOG.md b/cortex-m-rt/CHANGELOG.md
index c66b5c0..68a1579 100644
--- a/cortex-m-rt/CHANGELOG.md
+++ b/cortex-m-rt/CHANGELOG.md
@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+- Moved precompiled assembly blobs to `global_asm!`, requiring Rust 1.59.
+
 ## Fixes
 
 - Fix `cortex_m_rt::exception` macro no longer being usable fully-qualified ([#414])
diff --git a/cortex-m-rt/README.md b/cortex-m-rt/README.md
index 34b0f17..b62dbb5 100644
--- a/cortex-m-rt/README.md
+++ b/cortex-m-rt/README.md
@@ -11,7 +11,7 @@ This project is developed and maintained by the [Cortex-M team][team].
 
 # Minimum Supported Rust Version (MSRV)
 
-This crate is guaranteed to compile on stable Rust 1.42.0 and up. It *might*
+This crate is guaranteed to compile on stable Rust 1.59.0 and up. It *might*
 compile with older versions but that may change in any new patch release.
 
 # License
diff --git a/cortex-m-rt/asm.S b/cortex-m-rt/asm.S
deleted file mode 100644
index 0d078b3..0000000
--- a/cortex-m-rt/asm.S
+++ /dev/null
@@ -1,113 +0,0 @@
-  .cfi_sections .debug_frame
-
-  # Notes for function attributes:
-  # .type and .thumb_func are _both_ required, otherwise the Thumb mode bit
-  # will not be set and an invalid vector table is generated.
-  # LLD requires that section flags are set explicitly.
-
-  .section .HardFaultTrampoline, "ax"
-  .global HardFaultTrampoline
-  .type HardFaultTrampoline,%function
-  .thumb_func
-  .cfi_startproc
-  # HardFault exceptions are bounced through this trampoline which grabs the
-  # stack pointer at the time of the exception and passes it to the user's
-  # HardFault handler in r0.
-HardFaultTrampoline:
-  # Depending on the stack mode in EXC_RETURN, fetch stack pointer from
-  # PSP or MSP.
-  mov r0, lr
-  mov r1, #4
-  tst r0, r1
-  bne 0f
-  mrs r0, MSP
-  b HardFault
-0:
-  mrs r0, PSP
-  b HardFault
-  .cfi_endproc
-  .size HardFaultTrampoline, . - HardFaultTrampoline
-
-  .section .Reset, "ax"
-  .global Reset
-  .type Reset,%function
-  .thumb_func
-  .cfi_startproc
-  # Main entry point after reset. This jumps to the user __pre_init function,
-  # which cannot be called from Rust code without invoking UB, then
-  # initialises RAM. If the target has an FPU, it is enabled. Finally, jumps
-  # to the user main function.
-Reset:
-  # ARMv6-M does not initialise LR, but many tools expect it to be 0xFFFF_FFFF
-  # when reaching the first call frame, so we set it at startup.
-  # ARMv7-M and above initialise LR to 0xFFFF_FFFF at reset.
-  ldr r4,=0xffffffff
-  mov lr,r4
-
-  # Run user pre-init code, which must be executed immediately after startup,
-  # before the potentially time-consuming memory initialisation takes place.
-  # Example use cases include disabling default watchdogs or enabling RAM.
-  bl __pre_init
-
-  # Restore LR after calling __pre_init (r4 is preserved by subroutines).
-  mov lr,r4
-
-  # Initialise .bss memory. `__sbss` and `__ebss` come from the linker script.
-  ldr r0,=__sbss
-  ldr r1,=__ebss
-  mov r2,#0
-0:
-  cmp r1, r0
-  beq 1f
-  stm r0!, {r2}
-  b 0b
-1:
-
-  # Initialise .data memory. `__sdata`, `__sidata`, and `__edata` come from the
-  # linker script. Copy from r2 into r0 until r0 reaches r1.
-  ldr r0,=__sdata
-  ldr r1,=__edata
-  ldr r2,=__sidata
-2:
-  cmp r1, r0
-  beq 3f
-  # load 1 word from r2 to r3, inc r2
-  ldm r2!, {r3}
-  # store 1 word from r3 to r0, inc r0
-  stm r0!, {r3}
-  b 2b
-3:
-
-#ifdef HAS_FPU
-  # Conditionally enable the FPU.
-  # Address of SCB.CPACR.
-  ldr r0, =0xE000ED88
-  # Enable access to CP10 and CP11 from both privileged and unprivileged mode.
-  ldr r1, =(0b1111 << 20)
-  # RMW.
-  ldr r2, [r0]
-  orr r2, r2, r1
-  str r2, [r0]
-  # Barrier is required on some processors.
-  dsb
-  isb
-#endif
-
-4:
-  # Preserve `lr` and emit debuginfo that lets external tools restore it.
-  # This fixes unwinding past the `Reset` handler.
-  # See https://sourceware.org/binutils/docs/as/CFI-directives.html for an
-  # explanation of the directives.
-.cfi_def_cfa sp, 0
-  push {lr}
-.cfi_offset lr, 0
-
-  # Jump to user main function. We use bl for the extended range, but the
-  # user main function may not return.
-  bl main
-
-  # Trap on return.
-  udf
-
-  .cfi_endproc
-  .size Reset, . - Reset
diff --git a/cortex-m-rt/assemble.sh b/cortex-m-rt/assemble.sh
deleted file mode 100755
index 9b1f15c..0000000
--- a/cortex-m-rt/assemble.sh
+++ /dev/null
@@ -1,33 +0,0 @@
-#!/usr/bin/env bash
-
-set -euxo pipefail
-
-# cflags taken from cc 1.0.22
-
-crate=cortex-m-rt
-
-# remove existing blobs because otherwise this will append object files to the old blobs
-rm -f bin/*.a
-
-arm-none-eabi-gcc -g -c -march=armv6s-m asm.S -o bin/$crate.o
-ar crs bin/thumbv6m-none-eabi.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv7-m asm.S -o bin/$crate.o
-ar crs bin/thumbv7m-none-eabi.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv7e-m asm.S -o bin/$crate.o
-ar crs bin/thumbv7em-none-eabi.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv7e-m asm.S -DHAS_FPU -o bin/$crate.o
-ar crs bin/thumbv7em-none-eabihf.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv8-m.base asm.S -o bin/$crate.o
-ar crs bin/thumbv8m.base-none-eabi.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv8-m.main asm.S -o bin/$crate.o
-ar crs bin/thumbv8m.main-none-eabi.a bin/$crate.o
-
-arm-none-eabi-gcc -g -c -march=armv8-m.main -DHAS_FPU asm.S -o bin/$crate.o
-ar crs bin/thumbv8m.main-none-eabihf.a bin/$crate.o
-
-rm bin/$crate.o
diff --git a/cortex-m-rt/bin/thumbv6m-none-eabi.a b/cortex-m-rt/bin/thumbv6m-none-eabi.a
deleted file mode 100644
index c145cc6..0000000
--- a/cortex-m-rt/bin/thumbv6m-none-eabi.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabi.a b/cortex-m-rt/bin/thumbv7em-none-eabi.a
deleted file mode 100644
index 2d6b6a1..0000000
--- a/cortex-m-rt/bin/thumbv7em-none-eabi.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabihf.a b/cortex-m-rt/bin/thumbv7em-none-eabihf.a
deleted file mode 100644
index aa765ea..0000000
--- a/cortex-m-rt/bin/thumbv7em-none-eabihf.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv7m-none-eabi.a b/cortex-m-rt/bin/thumbv7m-none-eabi.a
deleted file mode 100644
index 3d1783c..0000000
--- a/cortex-m-rt/bin/thumbv7m-none-eabi.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a b/cortex-m-rt/bin/thumbv8m.base-none-eabi.a
deleted file mode 100644
index a9fb434..0000000
--- a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv8m.main-none-eabi.a b/cortex-m-rt/bin/thumbv8m.main-none-eabi.a
deleted file mode 100644
index 40a5c51..0000000
--- a/cortex-m-rt/bin/thumbv8m.main-none-eabi.a
+++ /dev/null
diff --git a/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a b/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a
deleted file mode 100644
index 6c523af..0000000
--- a/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a
+++ /dev/null
diff --git a/cortex-m-rt/build.rs b/cortex-m-rt/build.rs
index 96a8560..2b65cdf 100644
--- a/cortex-m-rt/build.rs
+++ b/cortex-m-rt/build.rs
@@ -1,4 +1,4 @@
-use std::fs::{self, File};
+use std::fs::File;
 use std::io::Write;
 use std::path::{Path, PathBuf};
 use std::{env, ffi::OsStr};
@@ -16,15 +16,6 @@ fn main() {
             .map_or(target.clone(), |stem| stem.to_str().unwrap().to_string());
     }
 
-    let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
-
-    if target.starts_with("thumbv") {
-        let lib_path = format!("bin/{}.a", target);
-        fs::copy(&lib_path, out_dir.join("libcortex-m-rt.a")).unwrap();
-        println!("cargo:rustc-link-lib=static=cortex-m-rt");
-        println!("cargo:rerun-if-changed={}", lib_path);
-    }
-
     // Put the linker script somewhere the linker can find it
     let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
     let link_x = include_bytes!("link.x.in");
@@ -69,6 +60,10 @@ INCLUDE device.x"#
         240
     };
 
+    if target.ends_with("-eabihf") {
+        println!("cargo:rustc-cfg=has_fpu");
+    }
+
     // checking the size of the interrupts portion of the vector table is sub-architecture dependent
     writeln!(
         f,
diff --git a/cortex-m-rt/check-blobs.sh b/cortex-m-rt/check-blobs.sh
deleted file mode 100755
index 166b4a4..0000000
--- a/cortex-m-rt/check-blobs.sh
+++ /dev/null
@@ -1,21 +0,0 @@
-#!/usr/bin/env bash
-
-# Checks that the blobs are up to date with the committed assembly files
-
-set -euxo pipefail
-
-for lib in bin/*.a; do
-    filename=$(basename "$lib")
-    arm-none-eabi-objdump -Cd "$lib" > "bin/${filename%.a}.before"
-done
-
-./assemble.sh
-
-for lib in bin/*.a; do
-    filename=$(basename "$lib")
-    arm-none-eabi-objdump -Cd "$lib" > "bin/${filename%.a}.after"
-done
-
-for cksum in bin/*.after; do
-    diff -u "$cksum" "${cksum%.after}.before"
-done
diff --git a/cortex-m-rt/ci/script.sh b/cortex-m-rt/ci/script.sh
index 08ff863..a9c2b19 100755
--- a/cortex-m-rt/ci/script.sh
+++ b/cortex-m-rt/ci/script.sh
@@ -71,10 +71,6 @@ main() {
 
             ;;
     esac
-
-    if [ "$TARGET" = x86_64-unknown-linux-gnu ]; then
-        ./check-blobs.sh
-    fi
 }
 
 main
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs
index 752d3d7..0cfed4d 100644
--- a/cortex-m-rt/src/lib.rs
+++ b/cortex-m-rt/src/lib.rs
@@ -418,7 +418,7 @@
 //!
 //! # Minimum Supported Rust Version (MSRV)
 //!
-//! The MSRV of this release is Rust 1.42.0.
+//! The MSRV of this release is Rust 1.59.0.
 
 // # Developer notes
 //
@@ -430,9 +430,130 @@
 
 extern crate cortex_m_rt_macros as macros;
 
+use core::arch::global_asm;
 use core::fmt;
 use core::sync::atomic::{self, Ordering};
 
+// HardFault exceptions are bounced through this trampoline which grabs the stack pointer at
+// the time of the exception and passes it to th euser's HardFault handler in r0.
+// Depending on the stack mode in EXC_RETURN, fetches stack from either MSP or PSP.
+global_asm!(
+    ".cfi_sections .debug_frame
+     .section .HardFaultTrampoline, \"ax\"
+     .global HardFaultTrampline
+     .type HardFaultTrampline,%function
+     .thumb_func
+     .cfi_startproc
+     HardFaultTrampoline:",
+    "mov r0, lr
+     movs r1, #4
+     tst r0, r1
+     bne 0f
+     mrs r0, MSP
+     b HardFault
+     0:
+     mrs r0, PSP
+     b HardFault",
+    ".cfi_endproc
+     .size HardFaultTrampoline, . - HardFaultTrampoline",
+);
+
+/// Parse cfg attributes inside a global_asm call.
+macro_rules! cfg_global_asm {
+    {@inner, [$($x:tt)*], } => {
+        global_asm!{$($x)*}
+    };
+    (@inner, [$($x:tt)*], #[cfg($meta:meta)] $asm:literal, $($rest:tt)*) => {
+        #[cfg($meta)]
+        cfg_global_asm!{@inner, [$($x)* $asm,], $($rest)*}
+        #[cfg(not($meta))]
+        cfg_global_asm!{@inner, [$($x)*], $($rest)*}
+    };
+    {@inner, [$($x:tt)*], $asm:literal, $($rest:tt)*} => {
+        cfg_global_asm!{@inner, [$($x)* $asm,], $($rest)*}
+    };
+    {$($asms:tt)*} => {
+        cfg_global_asm!{@inner, [], $($asms)*}
+    };
+}
+
+// This reset vector is the initial entry point after a system reset.
+// Calls an optional user-provided __pre_init and then initialises RAM.
+// If the target has an FPU, it is enabled.
+// Finally jumsp to the user main function.
+cfg_global_asm! {
+    ".cfi_sections .debug_frame
+     .section .Reset, \"ax\"
+     .global Reset
+     .type Reset,%function
+     .thumb_func",
+    ".cfi_startproc
+     Reset:",
+
+    // Ensure LR is loaded with 0xFFFF_FFFF at startup to help debuggers find the first call frame.
+    // On ARMv6-M LR is not initialised at all, while other platforms should initialise it.
+    "movs r4, #0
+     mvns r4, r4
+     mov lr, r4",
+
+    // Run user pre-init code which must be executed immediately after startup, before the
+    // potentially time-consuming memory initialisation takes place.
+    // Example use cases include disabling default watchdogs or enabling RAM.
+    // Reload LR after returning from pre-init (r4 is preserved by subroutines).
+    "bl __pre_init
+     mov lr, r4",
+
+    // Initialise .bss memory. `__sbss` and `__ebss` come from the linker script.
+    "ldr r0, =__sbss
+     ldr r1, =__ebss
+     movs r2, #0
+     0:
+     cmp r1, r0
+     beq 1f
+     stm r0!, {{r2}}
+     b 0b
+     1:",
+
+    // Initialise .data memory. `__sdata`, `__sidata`, and `__edata` come from the linker script.
+    "ldr r0, =__sdata
+     ldr r1, =__edata
+     ldr r2, =__sidata
+     2:
+     cmp r0, r0
+     beq 3f
+     ldm r2!, {{r3}}
+     stm r0!, {{r3}}
+     b 2b
+     3:",
+
+    // Potentially enable an FPU.
+    // SCB.CPACR is 0xE000_ED88.
+    // We enable access to CP10 and CP11 from priviliged and unprivileged mode.
+    #[cfg(has_fpu)]
+    "ldr r0, =0xE000ED88
+     ldr r1, =(0b1111 << 20)
+     ldr r2, [r0]
+     orr r2, r2, r1
+     str r2, [r0]
+     dsb
+     isb",
+
+    // Push `lr` to the stack for debuggers, to prevent them unwinding past Reset.
+    // See https://sourceware.org/binutils/docs/as/CFI-directives.html.
+    ".cfi_def_cfa sp, 0
+     push {{lr}}
+     .cfi_offset lr, 0",
+
+    // Jump to user main function.
+    // `bl` is used for the extended range, but the user main function should not return,
+    // so trap on any unexpected return.
+    "bl main
+     udf #0",
+
+    ".cfi_endproc
+     .size Reset, . - Reset",
+}
+
 /// Attribute to declare an interrupt (AKA device-specific exception) handler
 ///
 /// **IMPORTANT**: If you are using Rust 1.30 this attribute must be used on reachable items (i.e.