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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2020-05-25 00:25:56 +0000
committerGravatar GitHub <noreply@github.com> 2020-05-25 00:25:56 +0000
commit3136e01e708413774d7be2868705e1782c910027 (patch)
tree6283febb39959b153502e95f5dbba327875c52b9
parentfc19f3e1588e7486716667dbd0db37c6dc41d0ed (diff)
parent97141b951b044bd4a06478454a179d633f28d148 (diff)
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Merge #219
219: ITM: don't test reserved bits in is_fifo_ready r=adamgreig a=cbiffle On ARMv7-M, bits 31:1 of the value read from STIMx are reserved, so comparing them against zero is a bad idea. On ARMv8-M, bit 1 has been repurposed to indicate DISABLED. This means that the is_fifo_ready impl hangs forever when ITM is disabled on a Cortex-M33 (for example). Changed to test only the FIFOREADY bit. @bcantrill Co-authored-by: Cliff L. Biffle <cliff@oxide.computer>
-rw-r--r--src/peripheral/itm.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/peripheral/itm.rs b/src/peripheral/itm.rs
index 0b63524..57d2ff8 100644
--- a/src/peripheral/itm.rs
+++ b/src/peripheral/itm.rs
@@ -55,6 +55,6 @@ impl Stim {
/// Returns `true` if the stimulus port is ready to accept more data
#[inline]
pub fn is_fifo_ready(&self) -> bool {
- unsafe { ptr::read_volatile(self.register.get()) == 1 }
+ unsafe { ptr::read_volatile(self.register.get()) & 1 == 1 }
}
}