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| author |  Jonathan 'theJPster' Pallant <github@thejpster.org.uk>
| 2019-03-16 21:47:03 +0000 |
|---|---|---|
| committer | Jonathan 'theJPster' Pallant <github@thejpster.org.uk>
| 2019-03-16 21:47:03 +0000 |
| commit | 31fe0d64d87c2d305a96e060f5e9f54d1ff1377f (patch) | |
| tree | 594b2ec9fa03ba6999cb2183d38bcb42eaab8a70 | |
| parent | 2886787f409e241663b36021158607d1ccc37750 (diff) | |
| download | cortex-m-31fe0d64d87c2d305a96e060f5e9f54d1ff1377f.tar.gz cortex-m-31fe0d64d87c2d305a96e060f5e9f54d1ff1377f.tar.zst cortex-m-31fe0d64d87c2d305a96e060f5e9f54d1ff1377f.zip | |
Build on x86 (even if that's weird for a Cortex-M support crate)
| -rw-r--r-- | cortex-m-rt/build.rs | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/cortex-m-rt/build.rs b/cortex-m-rt/build.rs index 9d06935..5a8fb9c 100644 --- a/cortex-m-rt/build.rs +++ b/cortex-m-rt/build.rs @@ -55,7 +55,9 @@ INCLUDE device.x"# println!("cargo:rustc-cfg=armv8m"); 240 } else { - panic!("Unexpected target {:?}", target); + // Non ARM target. We assume you're just testing the syntax. + // This value seems as soon as any + 240 }; // checking the size of the interrupts portion of the vector table is sub-architecture dependent |