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author | 2018-08-11 20:41:46 -0500 | |
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committer | 2018-08-11 20:41:46 -0500 | |
commit | 3b25e71a78c6ac8514f3d59dc6e124a57439dcb6 (patch) | |
tree | 12630e79c3f08c358fccfe680813b159576fea21 | |
parent | 230d42233d35f13de82c1c7cb893352512ed3794 (diff) | |
download | cortex-m-3b25e71a78c6ac8514f3d59dc6e124a57439dcb6.tar.gz cortex-m-3b25e71a78c6ac8514f3d59dc6e124a57439dcb6.tar.zst cortex-m-3b25e71a78c6ac8514f3d59dc6e124a57439dcb6.zip |
v0.5.2
-rw-r--r-- | cortex-m-rt/CHANGELOG.md | 64 | ||||
-rw-r--r-- | cortex-m-rt/Cargo.toml | 3 | ||||
-rw-r--r-- | cortex-m-rt/ci/script.sh | 1 | ||||
-rw-r--r-- | cortex-m-rt/examples/alignment.rs | 14 | ||||
-rw-r--r-- | cortex-m-rt/examples/device.rs | 16 | ||||
-rw-r--r-- | cortex-m-rt/examples/main.rs | 15 | ||||
-rw-r--r-- | cortex-m-rt/examples/minimal.rs | 16 | ||||
-rw-r--r-- | cortex-m-rt/examples/override-exception.rs | 35 | ||||
-rw-r--r-- | cortex-m-rt/examples/state.rs | 14 |
9 files changed, 78 insertions, 100 deletions
diff --git a/cortex-m-rt/CHANGELOG.md b/cortex-m-rt/CHANGELOG.md index 16958e0..e0de1a4 100644 --- a/cortex-m-rt/CHANGELOG.md +++ b/cortex-m-rt/CHANGELOG.md @@ -7,6 +7,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.5.2] - 2018-08-11 + +### Changed + +- The `entry!` and `exception!` macros now also accept a closure instead of a path. + +- `DefaultHandler` and `UserHardFault` now default to an infinite loop if left undefined. + ## [v0.5.1] - 2018-05-14 ### Fixed @@ -319,30 +327,32 @@ section size addr Initial release -[Unreleased]: https://github.com/japaric/cortex-m-rt/compare/v0.5.0...HEAD -[v0.5.0]: https://github.com/japaric/cortex-m-rt/compare/v0.4.0...v0.3.0 -[v0.4.0]: https://github.com/japaric/cortex-m-rt/compare/v0.3.15...v0.4.0 -[v0.3.15]: https://github.com/japaric/cortex-m-rt/compare/v0.3.14...v0.3.15 -[v0.3.14]: https://github.com/japaric/cortex-m-rt/compare/v0.3.13...v0.3.14 -[v0.3.13]: https://github.com/japaric/cortex-m-rt/compare/v0.3.12...v0.3.13 -[v0.3.12]: https://github.com/japaric/cortex-m-rt/compare/v0.3.11...v0.3.12 -[v0.3.11]: https://github.com/japaric/cortex-m-rt/compare/v0.3.10...v0.3.11 -[v0.3.10]: https://github.com/japaric/cortex-m-rt/compare/v0.3.9...v0.3.10 -[v0.3.9]: https://github.com/japaric/cortex-m-rt/compare/v0.3.8...v0.3.9 -[v0.3.8]: https://github.com/japaric/cortex-m-rt/compare/v0.3.7...v0.3.8 -[v0.3.7]: https://github.com/japaric/cortex-m-rt/compare/v0.3.6...v0.3.7 -[v0.3.6]: https://github.com/japaric/cortex-m-rt/compare/v0.3.5...v0.3.6 -[v0.3.5]: https://github.com/japaric/cortex-m-rt/compare/v0.3.4...v0.3.5 -[v0.3.4]: https://github.com/japaric/cortex-m-rt/compare/v0.3.3...v0.3.4 -[v0.3.3]: https://github.com/japaric/cortex-m-rt/compare/v0.3.2...v0.3.3 -[v0.3.2]: https://github.com/japaric/cortex-m-rt/compare/v0.3.1...v0.3.2 -[v0.3.1]: https://github.com/japaric/cortex-m-rt/compare/v0.3.0...v0.3.1 -[v0.3.0]: https://github.com/japaric/cortex-m-rt/compare/v0.2.4...v0.3.0 -[v0.2.4]: https://github.com/japaric/cortex-m-rt/compare/v0.2.3...v0.2.4 -[v0.2.3]: https://github.com/japaric/cortex-m-rt/compare/v0.2.2...v0.2.3 -[v0.2.2]: https://github.com/japaric/cortex-m-rt/compare/v0.2.1...v0.2.2 -[v0.2.1]: https://github.com/japaric/cortex-m-rt/compare/v0.2.0...v0.2.1 -[v0.2.0]: https://github.com/japaric/cortex-m-rt/compare/v0.1.3...v0.2.0 -[v0.1.3]: https://github.com/japaric/cortex-m-rt/compare/v0.1.2...v0.1.3 -[v0.1.2]: https://github.com/japaric/cortex-m-rt/compare/v0.1.1...v0.1.2 -[v0.1.1]: https://github.com/japaric/cortex-m-rt/compare/v0.1.0...v0.1.1 +[Unreleased]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.5.2...HEAD +[v0.5.2]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.5.1...v0.5.2 +[v0.5.1]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.5.0...v0.5.1 +[v0.5.0]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.4.0...v0.5.0 +[v0.4.0]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.15...v0.4.0 +[v0.3.15]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.14...v0.3.15 +[v0.3.14]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.13...v0.3.14 +[v0.3.13]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.12...v0.3.13 +[v0.3.12]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.11...v0.3.12 +[v0.3.11]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.10...v0.3.11 +[v0.3.10]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.9...v0.3.10 +[v0.3.9]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.8...v0.3.9 +[v0.3.8]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.7...v0.3.8 +[v0.3.7]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.6...v0.3.7 +[v0.3.6]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.5...v0.3.6 +[v0.3.5]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.4...v0.3.5 +[v0.3.4]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.3...v0.3.4 +[v0.3.3]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.2...v0.3.3 +[v0.3.2]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.1...v0.3.2 +[v0.3.1]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.3.0...v0.3.1 +[v0.3.0]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.2.4...v0.3.0 +[v0.2.4]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.2.3...v0.2.4 +[v0.2.3]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.2.2...v0.2.3 +[v0.2.2]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.2.1...v0.2.2 +[v0.2.1]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.2.0...v0.2.1 +[v0.2.0]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.1.3...v0.2.0 +[v0.1.3]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.1.2...v0.1.3 +[v0.1.2]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.1.1...v0.1.2 +[v0.1.1]: https://github.com/rust-embedded/cortex-m-rt/compare/v0.1.0...v0.1.1 diff --git a/cortex-m-rt/Cargo.toml b/cortex-m-rt/Cargo.toml index 9cd9d19..7027da3 100644 --- a/cortex-m-rt/Cargo.toml +++ b/cortex-m-rt/Cargo.toml @@ -7,7 +7,7 @@ keywords = ["arm", "cortex-m", "runtime", "startup"] license = "MIT OR Apache-2.0" name = "cortex-m-rt" repository = "https://github.com/japaric/cortex-m-rt" -version = "0.5.1" +version = "0.5.2" [build-dependencies] cc = "1.0.10" @@ -18,6 +18,7 @@ r0 = "0.2.1" [dev-dependencies] panic-semihosting = "0.3.0" panic-abort = "0.2.0" +cortex-m = "0.5.3" [features] device = [] diff --git a/cortex-m-rt/ci/script.sh b/cortex-m-rt/ci/script.sh index 2515b8f..902468d 100644 --- a/cortex-m-rt/ci/script.sh +++ b/cortex-m-rt/ci/script.sh @@ -9,6 +9,7 @@ main() { alignment minimal main + override-exception state ) if [ $TRAVIS_RUST_VERSION = nightly ]; then diff --git a/cortex-m-rt/examples/alignment.rs b/cortex-m-rt/examples/alignment.rs index ef1beaa..5635851 100644 --- a/cortex-m-rt/examples/alignment.rs +++ b/cortex-m-rt/examples/alignment.rs @@ -4,14 +4,12 @@ #![no_main] #![no_std] -#[macro_use(entry, exception)] +#[macro_use(entry)] extern crate cortex_m_rt as rt; extern crate panic_abort; use core::ptr; -use rt::ExceptionFrame; - entry!(main); static mut BSS1: u16 = 0; @@ -33,13 +31,3 @@ fn main() -> ! { loop {} } - -exception!(HardFault, hard_fault); - -fn hard_fault(_ef: &ExceptionFrame) -> ! { - loop {} -} - -exception!(*, default_handler); - -fn default_handler(_irqn: i16) {} diff --git a/cortex-m-rt/examples/device.rs b/cortex-m-rt/examples/device.rs index cf91f21..4395db2 100644 --- a/cortex-m-rt/examples/device.rs +++ b/cortex-m-rt/examples/device.rs @@ -5,12 +5,10 @@ #![no_main] #![no_std] -#[macro_use(entry, exception)] +#[macro_use(entry)] extern crate cortex_m_rt as rt; extern crate panic_semihosting; -use rt::ExceptionFrame; - // the program entry point entry!(main); @@ -18,18 +16,6 @@ fn main() -> ! { loop {} } -// the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(_ef: &ExceptionFrame) -> ! { - loop {} -} - -// the default exception handler -exception!(*, default_handler); - -fn default_handler(_irqn: i16) {} - // interrupts portion of the vector table pub union Vector { handler: unsafe extern "C" fn(), diff --git a/cortex-m-rt/examples/main.rs b/cortex-m-rt/examples/main.rs index d319249..e5ce3d1 100644 --- a/cortex-m-rt/examples/main.rs +++ b/cortex-m-rt/examples/main.rs @@ -4,25 +4,10 @@ #![no_main] #![no_std] -#[macro_use(exception)] extern crate cortex_m_rt as rt; extern crate panic_semihosting; -use rt::ExceptionFrame; - #[no_mangle] pub unsafe extern "C" fn main() -> ! { loop {} } - -// the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(_ef: &ExceptionFrame) -> ! { - loop {} -} - -// the default exception handler -exception!(*, default_handler); - -fn default_handler(_irqn: i16) {} diff --git a/cortex-m-rt/examples/minimal.rs b/cortex-m-rt/examples/minimal.rs index c12d12d..a036046 100644 --- a/cortex-m-rt/examples/minimal.rs +++ b/cortex-m-rt/examples/minimal.rs @@ -5,27 +5,13 @@ #![no_main] #![no_std] -#[macro_use(entry, exception)] +#[macro_use(entry)] extern crate cortex_m_rt as rt; extern crate panic_semihosting; -use rt::ExceptionFrame; - // the program entry point entry!(main); fn main() -> ! { loop {} } - -// the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(_ef: &ExceptionFrame) -> ! { - loop {} -} - -// the default exception handler -exception!(*, default_handler); - -fn default_handler(_irqn: i16) {} diff --git a/cortex-m-rt/examples/override-exception.rs b/cortex-m-rt/examples/override-exception.rs new file mode 100644 index 0000000..2f100a2 --- /dev/null +++ b/cortex-m-rt/examples/override-exception.rs @@ -0,0 +1,35 @@ +//! How to override the hard fault exception handler and the default exception handler + +#![deny(unsafe_code)] +#![deny(warnings)] +#![no_main] +#![no_std] + +extern crate cortex_m; +#[macro_use(entry, exception)] +extern crate cortex_m_rt as rt; +extern crate panic_semihosting; + +use cortex_m::asm; +use rt::ExceptionFrame; + +// the program entry point +entry!(main); + +fn main() -> ! { + loop {} +} + +exception!(*, default_handler); + +fn default_handler(_irqn: i16) { + asm::bkpt(); +} + +exception!(HardFault, hard_fault); + +fn hard_fault(_ef: &ExceptionFrame) -> ! { + asm::bkpt(); + + loop {} +} diff --git a/cortex-m-rt/examples/state.rs b/cortex-m-rt/examples/state.rs index 0b5eeeb..dbacdaf 100644 --- a/cortex-m-rt/examples/state.rs +++ b/cortex-m-rt/examples/state.rs @@ -9,8 +9,6 @@ extern crate cortex_m_rt as rt; extern crate panic_semihosting; -use rt::ExceptionFrame; - // the program entry point entry!(main); @@ -24,15 +22,3 @@ exception!(SysTick, sys_tick, state: u32 = 0); fn sys_tick(state: &mut u32) { *state += 1; } - -// the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(_ef: &ExceptionFrame) -> ! { - loop {} -} - -// the default exception handler -exception!(*, default_handler); - -fn default_handler(_irqn: i16) {} |