aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGravatar Jonas Schievink <jonasschievink@gmail.com> 2019-09-10 11:11:23 +0200
committerGravatar Jonas Schievink <jonasschievink@gmail.com> 2019-09-10 11:11:23 +0200
commit3d1fd33d4b387732a0878f356c8346e1e6c30368 (patch)
treea931482eb94b9663f4931fc2064c4ff01d2ecd92
parentb936865b76db24e160f4835e6ee73791c36dbc0a (diff)
downloadcortex-m-3d1fd33d4b387732a0878f356c8346e1e6c30368.tar.gz
cortex-m-3d1fd33d4b387732a0878f356c8346e1e6c30368.tar.zst
cortex-m-3d1fd33d4b387732a0878f356c8346e1e6c30368.zip
Make some trivial functions eligible for inlining
-rw-r--r--src/register/control.rs14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/register/control.rs b/src/register/control.rs
index 959bf91..20a48d7 100644
--- a/src/register/control.rs
+++ b/src/register/control.rs
@@ -8,16 +8,19 @@ pub struct Control {
impl Control {
/// Creates a `Control` value from raw bits.
+ #[inline]
pub fn from_bits(bits: u32) -> Self {
Self { bits }
}
/// Returns the contents of the register as raw bits
+ #[inline]
pub fn bits(&self) -> u32 {
self.bits
}
/// Thread mode privilege level
+ #[inline]
pub fn npriv(&self) -> Npriv {
if self.bits & (1 << 0) == (1 << 0) {
Npriv::Unprivileged
@@ -27,6 +30,7 @@ impl Control {
}
/// Sets the thread mode privilege level value (nPRIV).
+ #[inline]
pub fn set_npriv(&mut self, npriv: Npriv) {
let mask = 1 << 0;
match npriv {
@@ -36,6 +40,7 @@ impl Control {
}
/// Currently active stack pointer
+ #[inline]
pub fn spsel(&self) -> Spsel {
if self.bits & (1 << 1) == (1 << 1) {
Spsel::Psp
@@ -45,6 +50,7 @@ impl Control {
}
/// Sets the SPSEL value.
+ #[inline]
pub fn set_spsel(&mut self, spsel: Spsel) {
let mask = 1 << 1;
match spsel {
@@ -54,6 +60,7 @@ impl Control {
}
/// Whether context floating-point is currently active
+ #[inline]
pub fn fpca(&self) -> Fpca {
if self.bits & (1 << 2) == (1 << 2) {
Fpca::Active
@@ -63,6 +70,7 @@ impl Control {
}
/// Sets the FPCA value.
+ #[inline]
pub fn set_fpca(&mut self, fpca: Fpca) {
let mask = 1 << 2;
match fpca {
@@ -83,11 +91,13 @@ pub enum Npriv {
impl Npriv {
/// Is in privileged thread mode?
+ #[inline]
pub fn is_privileged(&self) -> bool {
*self == Npriv::Privileged
}
/// Is in unprivileged thread mode?
+ #[inline]
pub fn is_unprivileged(&self) -> bool {
*self == Npriv::Unprivileged
}
@@ -104,11 +114,13 @@ pub enum Spsel {
impl Spsel {
/// Is MSP the current stack pointer?
+ #[inline]
pub fn is_msp(&self) -> bool {
*self == Spsel::Msp
}
/// Is PSP the current stack pointer?
+ #[inline]
pub fn is_psp(&self) -> bool {
*self == Spsel::Psp
}
@@ -125,11 +137,13 @@ pub enum Fpca {
impl Fpca {
/// Is a floating-point context active?
+ #[inline]
pub fn is_active(&self) -> bool {
*self == Fpca::Active
}
/// Is a floating-point context not active?
+ #[inline]
pub fn is_not_active(&self) -> bool {
*self == Fpca::NotActive
}