diff options
| author |  bors[bot] <26634292+bors[bot]@users.noreply.github.com>
| 2021-03-02 20:06:19 +0000 |
|---|---|---|
| committer |  GitHub <noreply@github.com>
| 2021-03-02 20:06:19 +0000 |
| commit | 4573928ff1decb2c36c6bc7fe3be643c95fa493f (patch) | |
| tree | 7dd2d9f4e7e9d31711239069548d898c30e19724 | |
| parent | 62de02fb1a6c842bd2fd7c178489e16a068a599b (diff) | |
| parent | 59d30a44e1584b547f2b13e69a916ceb05a6564e (diff) | |
| download | cortex-m-4573928ff1decb2c36c6bc7fe3be643c95fa493f.tar.gz cortex-m-4573928ff1decb2c36c6bc7fe3be643c95fa493f.tar.zst cortex-m-4573928ff1decb2c36c6bc7fe3be643c95fa493f.zip | |
Merge #315
315: Use volatile read for ICSR register r=adamgreig a=lulf
This prevents the compiler from optimizing the read.
Edit: I also added a change to include the 9th bit in the IRQ. I can leave that out if it would break anything.
#314
Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
| -rw-r--r-- | cortex-m-rt/macros/src/lib.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cortex-m-rt/macros/src/lib.rs b/cortex-m-rt/macros/src/lib.rs index fe0264f..817e9a1 100644 --- a/cortex-m-rt/macros/src/lib.rs +++ b/cortex-m-rt/macros/src/lib.rs @@ -227,7 +227,7 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream { const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32; - let irqn = unsafe { core::ptr::read(SCB_ICSR) as u8 as i16 - 16 }; + let irqn = unsafe { (core::ptr::read_volatile(SCB_ICSR) & 0x1FF) as i16 - 16 }; #ident(irqn) } |