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| author |  whitequark <whitequark@whitequark.org>
| 2017-05-10 23:08:07 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org>
| 2017-05-10 23:08:07 +0000 |
| commit | 6b5c4cf602215fec400e4c9136feb3e271877b22 (patch) | |
| tree | 836fce7bf6ee3f499ee1beda46a6f25bf4145b22 | |
| parent | ddc8897d7c856c163da202303af565fad41742f0 (diff) | |
| download | cortex-m-6b5c4cf602215fec400e4c9136feb3e271877b22.tar.gz cortex-m-6b5c4cf602215fec400e4c9136feb3e271877b22.tar.zst cortex-m-6b5c4cf602215fec400e4c9136feb3e271877b22.zip | |
Fix bitmasks in peripheral::Scb::fpu_access_mode.
| -rw-r--r-- | src/peripheral/mod.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs index e9fae08..70653af 100644 --- a/src/peripheral/mod.rs +++ b/src/peripheral/mod.rs @@ -442,9 +442,9 @@ impl Scb { /// Gets FPU access mode pub fn fpu_access_mode(&self) -> FpuAccessMode { let cpacr = self.cpacr.read(); - if cpacr & (SCB_CPACR_FPU_ENABLE | SCB_CPACR_FPU_USER) != 0 { + if cpacr & SCB_CPACR_FPU_MASK == SCB_CPACR_FPU_ENABLE | SCB_CPACR_FPU_USER { FpuAccessMode::Enabled - } else if cpacr & SCB_CPACR_FPU_ENABLE != 0 { + } else if cpacr & SCB_CPACR_FPU_MASK == SCB_CPACR_FPU_ENABLE { FpuAccessMode::Privileged } else { FpuAccessMode::Disabled |