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author | 2020-06-09 18:49:00 -0700 | |
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committer | 2020-06-09 19:03:21 -0700 | |
commit | 705812c80f9bb267d3c0162d52dfd43dec9302f3 (patch) | |
tree | 6db588ec07820ab2b2e3c2806f8c9b24d86d4ef9 | |
parent | 97141b951b044bd4a06478454a179d633f28d148 (diff) | |
download | cortex-m-705812c80f9bb267d3c0162d52dfd43dec9302f3.tar.gz cortex-m-705812c80f9bb267d3c0162d52dfd43dec9302f3.tar.zst cortex-m-705812c80f9bb267d3c0162d52dfd43dec9302f3.zip |
ITM: don't test reserved bits in is_fifo_ready
On ARMv7-M, bits 31:1 of the value read from STIMx are reserved, so
comparing them against zero is a bad idea.
On ARMv8-M, bit 1 has been repurposed to indicate DISABLED. This means
that the is_fifo_ready impl hangs forever when ITM is disabled on a
Cortex-M33 (for example).
Changed to test only the FIFOREADY bit on ARMv7-M, and to test either
FIFOREADY or DISABLED on ARMv8-M.
-rw-r--r-- | src/peripheral/itm.rs | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/peripheral/itm.rs b/src/peripheral/itm.rs index 57d2ff8..c0d560f 100644 --- a/src/peripheral/itm.rs +++ b/src/peripheral/itm.rs @@ -53,8 +53,19 @@ impl Stim { } /// Returns `true` if the stimulus port is ready to accept more data + #[cfg(not(armv8m))] #[inline] pub fn is_fifo_ready(&self) -> bool { - unsafe { ptr::read_volatile(self.register.get()) & 1 == 1 } + unsafe { ptr::read_volatile(self.register.get()) & 0b1 == 1 } + } + + /// Returns `true` if the stimulus port is ready to accept more data + #[cfg(armv8m)] + #[inline] + pub fn is_fifo_ready(&self) -> bool { + // ARMv8-M adds a disabled bit; we indicate that we are ready to + // proceed with a stimulus write if the port is either ready (bit 0) or + // disabled (bit 1). + unsafe { ptr::read_volatile(self.register.get()) & 0b11 != 0 } } } |