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author | 2018-06-17 18:59:25 +0200 | |
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committer | 2018-06-17 18:59:25 +0200 | |
commit | 905629fdca76eb89bb77b86a1fba76d3ba3df479 (patch) | |
tree | d644b5df2f7ef83b1d17f06b3ff7a616110ec2ea | |
parent | 39172497729e827a6bb48f899a1facf5ceb2558b (diff) | |
download | cortex-m-905629fdca76eb89bb77b86a1fba76d3ba3df479.tar.gz cortex-m-905629fdca76eb89bb77b86a1fba76d3ba3df479.tar.zst cortex-m-905629fdca76eb89bb77b86a1fba76d3ba3df479.zip |
add method to trigger system reset
-rw-r--r-- | src/peripheral/scb.rs | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 2ad0770..cfd5e13 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -598,3 +598,21 @@ impl SCB { } } } + +const SCB_AIRCR_VECTKEY: u32 = 0x05FA << 16; +const SCB_AIRCR_PRIGROUP_MASK: u32 = 0x5 << 8; +const SCB_AIRCR_SYSRESETREQ: u32 = 1 << 2; + +impl SCB { + /// Initiate a system reset request to reset the MCU + pub fn system_reset(&mut self) -> ! { + ::asm::dsb(); + unsafe { self.aircr.modify(|r| + SCB_AIRCR_VECTKEY | // otherwise the write is ignored + r & SCB_AIRCR_PRIGROUP_MASK | // keep priority group unchanged + SCB_AIRCR_SYSRESETREQ // set the bit + ) }; + ::asm::dsb(); + loop {} // wait for the reset + } +} |