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| author |  Mara Bos <m-ou.se@m-ou.se>
| 2019-10-29 07:57:30 +0100 |
|---|---|---|
| committer | Mara Bos <m-ou.se@m-ou.se>
| 2019-10-29 07:57:30 +0100 |
| commit | 90c47174d15b3095964679c416962c5fe6bc3d5c (patch) | |
| tree | bd4512d80f30e19a5d1d86d2ef710d41cdf23380 | |
| parent | 073c8f059b7b68543b944059f681bc67ab809d5e (diff) | |
| download | cortex-m-90c47174d15b3095964679c416962c5fe6bc3d5c.tar.gz cortex-m-90c47174d15b3095964679c416962c5fe6bc3d5c.tar.zst cortex-m-90c47174d15b3095964679c416962c5fe6bc3d5c.zip | |
Add another missing #[inline].
| -rw-r--r-- | src/peripheral/dwt.rs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/peripheral/dwt.rs b/src/peripheral/dwt.rs index 4da7131..b340597 100644 --- a/src/peripheral/dwt.rs +++ b/src/peripheral/dwt.rs @@ -82,6 +82,7 @@ impl DWT { /// /// Some devices, like the STM32F7, software lock the DWT after a power cycle. #[cfg(not(armv6m))] + #[inline] pub fn unlock() { // NOTE(unsafe) atomic write to a stateless, write-only register unsafe { (*Self::ptr()).lar.write(0xC5ACCE55) } |