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author | 2021-12-19 19:14:35 +0000 | |
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committer | 2021-12-31 17:22:59 +0000 | |
commit | 9631347812a536f00f00c6698b8da2af98237ce6 (patch) | |
tree | 36a9c28505518035a4c24079b3426e77b4652d5d | |
parent | 4b536898ca8da6d20bd54d91fd7938aae0c538bf (diff) | |
download | cortex-m-9631347812a536f00f00c6698b8da2af98237ce6.tar.gz cortex-m-9631347812a536f00f00c6698b8da2af98237ce6.tar.zst cortex-m-9631347812a536f00f00c6698b8da2af98237ce6.zip |
Merge #372
372: asm/inline: explicitly use asm macro r=adamgreig a=jordens
`asm!()` removed from prelude in current nightly
https://github.com/rust-lang/rust/pull/91728
close #371
This is also a good candidate for the cortex-m v0.7 series.
Co-authored-by: Robert Jördens <rj@quartiq.de>
Co-authored-by: Adam Greig <adam@adamgreig.com>
-rw-r--r-- | asm-toolchain | 2 | ||||
-rw-r--r-- | asm/inline.rs | 124 | ||||
-rw-r--r-- | asm/lib.rs | 2 | ||||
-rw-r--r-- | bin/thumbv6m-none-eabi-lto.a | bin | 11788 -> 11196 bytes | |||
-rw-r--r-- | bin/thumbv6m-none-eabi.a | bin | 16344 -> 14576 bytes | |||
-rw-r--r-- | bin/thumbv7em-none-eabi-lto.a | bin | 15928 -> 15280 bytes | |||
-rw-r--r-- | bin/thumbv7em-none-eabi.a | bin | 21532 -> 19336 bytes | |||
-rw-r--r-- | bin/thumbv7em-none-eabihf-lto.a | bin | 16892 -> 16104 bytes | |||
-rw-r--r-- | bin/thumbv7em-none-eabihf.a | bin | 22828 -> 20480 bytes | |||
-rw-r--r-- | bin/thumbv7m-none-eabi-lto.a | bin | 14908 -> 14244 bytes | |||
-rw-r--r-- | bin/thumbv7m-none-eabi.a | bin | 20184 -> 18068 bytes | |||
-rw-r--r-- | bin/thumbv8m.base-none-eabi-lto.a | bin | 15056 -> 14280 bytes | |||
-rw-r--r-- | bin/thumbv8m.base-none-eabi.a | bin | 20772 -> 18680 bytes | |||
-rw-r--r-- | bin/thumbv8m.main-none-eabi-lto.a | bin | 19552 -> 18672 bytes | |||
-rw-r--r-- | bin/thumbv8m.main-none-eabi.a | bin | 27136 -> 24408 bytes | |||
-rw-r--r-- | bin/thumbv8m.main-none-eabihf-lto.a | bin | 20528 -> 19508 bytes | |||
-rw-r--r-- | bin/thumbv8m.main-none-eabihf.a | bin | 28404 -> 25524 bytes | |||
-rw-r--r-- | src/lib.rs | 2 |
18 files changed, 86 insertions, 44 deletions
diff --git a/asm-toolchain b/asm-toolchain index a36829b..cc5dbb2 100644 --- a/asm-toolchain +++ b/asm-toolchain @@ -1 +1 @@ -nightly-2020-08-26 +nightly-2021-12-16 diff --git a/asm/inline.rs b/asm/inline.rs index 5887baf..bbc04d2 100644 --- a/asm/inline.rs +++ b/asm/inline.rs @@ -6,17 +6,18 @@ //! All of these functions should be blanket-`unsafe`. `cortex-m` provides safe wrappers where //! applicable. +use core::arch::asm; use core::sync::atomic::{compiler_fence, Ordering}; #[inline(always)] pub unsafe fn __bkpt() { - asm!("bkpt"); + asm!("bkpt", options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __control_r() -> u32 { let r; - asm!("mrs {}, CONTROL", out(reg) r); + asm!("mrs {}, CONTROL", out(reg) r, options(nomem, nostack, preserves_flags)); r } @@ -27,7 +28,8 @@ pub unsafe fn __control_w(w: u32) { asm!( "msr CONTROL, {}", "isb", - in(reg) w + in(reg) w, + options(nomem, nostack, preserves_flags), ); // Ensure memory accesses are not reordered around the CONTROL update. @@ -36,7 +38,7 @@ pub unsafe fn __control_w(w: u32) { #[inline(always)] pub unsafe fn __cpsid() { - asm!("cpsid i"); + asm!("cpsid i", options(nomem, nostack, preserves_flags)); // Ensure no subsequent memory accesses are reordered to before interrupts are disabled. compiler_fence(Ordering::SeqCst); @@ -47,7 +49,7 @@ pub unsafe fn __cpsie() { // Ensure no preceeding memory accesses are reordered to after interrupts are enabled. compiler_fence(Ordering::SeqCst); - asm!("cpsie i"); + asm!("cpsie i", options(nomem, nostack, preserves_flags)); } #[inline(always)] @@ -62,48 +64,53 @@ pub unsafe fn __delay(cyc: u32) { "1:", "subs {}, #1", "bne 1b", - inout(reg) real_cyc => _ + inout(reg) real_cyc => _, + options(nomem, nostack), ); } #[inline(always)] pub unsafe fn __dmb() { compiler_fence(Ordering::SeqCst); - asm!("dmb"); + asm!("dmb", options(nomem, nostack, preserves_flags)); compiler_fence(Ordering::SeqCst); } #[inline(always)] pub unsafe fn __dsb() { compiler_fence(Ordering::SeqCst); - asm!("dsb"); + asm!("dsb", options(nomem, nostack, preserves_flags)); compiler_fence(Ordering::SeqCst); } #[inline(always)] pub unsafe fn __isb() { compiler_fence(Ordering::SeqCst); - asm!("isb"); + asm!("isb", options(nomem, nostack, preserves_flags)); compiler_fence(Ordering::SeqCst); } #[inline(always)] pub unsafe fn __msp_r() -> u32 { let r; - asm!("mrs {}, MSP", out(reg) r); + asm!("mrs {}, MSP", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __msp_w(val: u32) { - asm!("msr MSP, {}", in(reg) val); + // Technically is writing to the stack pointer "not pushing any data to the stack"? + // In any event, if we don't set `nostack` here, this method is useless as the new + // stack value is immediately mutated by returning. Really this is just not a good + // method and its higher-level use is marked as deprecated in cortex-m. + asm!("msr MSP, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } // NOTE: No FFI shim, this requires inline asm. #[inline(always)] pub unsafe fn __apsr_r() -> u32 { let r; - asm!("mrs {}, APSR", out(reg) r); + asm!("mrs {}, APSR", out(reg) r, options(nomem, nostack, preserves_flags)); r } @@ -112,80 +119,82 @@ pub unsafe fn __nop() { // NOTE: This is a `pure` asm block, but applying that option allows the compiler to eliminate // the nop entirely (or to collapse multiple subsequent ones). Since the user probably wants N // nops when they call `nop` N times, let's not add that option. - asm!("nop"); + asm!("nop", options(nomem, nostack, preserves_flags)); } // NOTE: No FFI shim, this requires inline asm. #[inline(always)] pub unsafe fn __pc_r() -> u32 { let r; - asm!("mov {}, pc", out(reg) r); + asm!("mov {}, pc", out(reg) r, options(nomem, nostack, preserves_flags)); r } // NOTE: No FFI shim, this requires inline asm. #[inline(always)] pub unsafe fn __pc_w(val: u32) { - asm!("mov pc, {}", in(reg) val); + asm!("mov pc, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } // NOTE: No FFI shim, this requires inline asm. #[inline(always)] pub unsafe fn __lr_r() -> u32 { let r; - asm!("mov {}, lr", out(reg) r); + asm!("mov {}, lr", out(reg) r, options(nomem, nostack, preserves_flags)); r } // NOTE: No FFI shim, this requires inline asm. #[inline(always)] pub unsafe fn __lr_w(val: u32) { - asm!("mov lr, {}", in(reg) val); + asm!("mov lr, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __primask_r() -> u32 { let r; - asm!("mrs {}, PRIMASK", out(reg) r); + asm!("mrs {}, PRIMASK", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __psp_r() -> u32 { let r; - asm!("mrs {}, PSP", out(reg) r); + asm!("mrs {}, PSP", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __psp_w(val: u32) { - asm!("msr PSP, {}", in(reg) val); + // See comment on __msp_w. Unlike MSP, there are legitimate use-cases for modifying PSP + // if MSP is currently being used as the stack pointer. + asm!("msr PSP, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __sev() { - asm!("sev"); + asm!("sev", options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __udf() -> ! { - asm!("udf #0", options(noreturn)); + asm!("udf #0", options(noreturn, nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __wfe() { - asm!("wfe"); + asm!("wfe", options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __wfi() { - asm!("wfi"); + asm!("wfi", options(nomem, nostack, preserves_flags)); } /// Semihosting syscall. #[inline(always)] pub unsafe fn __sh_syscall(mut nr: u32, arg: u32) -> u32 { - asm!("bkpt #0xab", inout("r0") nr, in("r1") arg); + asm!("bkpt #0xab", inout("r0") nr, in("r1") arg, options(nomem, nostack, preserves_flags)); nr } @@ -205,7 +214,7 @@ pub unsafe fn __bootstrap(msp: u32, rv: u32) -> ! { spsel = in(reg) 2, msp = in(reg) msp, rv = in(reg) rv, - options(noreturn), + options(noreturn, nomem, nostack), ); } @@ -214,29 +223,30 @@ pub unsafe fn __bootstrap(msp: u32, rv: u32) -> ! { pub use self::v7m::*; #[cfg(any(armv7m, armv8m_main))] mod v7m { + use core::arch::asm; use core::sync::atomic::{compiler_fence, Ordering}; #[inline(always)] pub unsafe fn __basepri_max(val: u8) { - asm!("msr BASEPRI_MAX, {}", in(reg) val); + asm!("msr BASEPRI_MAX, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __basepri_r() -> u8 { let r; - asm!("mrs {}, BASEPRI", out(reg) r); + asm!("mrs {}, BASEPRI", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __basepri_w(val: u8) { - asm!("msr BASEPRI, {}", in(reg) val); + asm!("msr BASEPRI, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __faultmask_r() -> u32 { let r; - asm!("mrs {}, FAULTMASK", out(reg) r); + asm!("mrs {}, FAULTMASK", out(reg) r, options(nomem, nostack, preserves_flags)); r } @@ -255,6 +265,7 @@ mod v7m { out(reg) _, out(reg) _, out(reg) _, + options(nostack), ); compiler_fence(Ordering::SeqCst); } @@ -274,6 +285,7 @@ mod v7m { out(reg) _, out(reg) _, out(reg) _, + options(nostack), ); compiler_fence(Ordering::SeqCst); } @@ -283,6 +295,8 @@ mod v7m { pub use self::v7em::*; #[cfg(armv7em)] mod v7em { + use core::arch::asm; + #[inline(always)] pub unsafe fn __basepri_max_cm7_r0p1(val: u8) { asm!( @@ -295,6 +309,7 @@ mod v7em { "cpsie i", in(reg) val, out(reg) _, + options(nomem, nostack, preserves_flags), ); } @@ -310,6 +325,7 @@ mod v7em { "cpsie i", in(reg) val, out(reg) _, + options(nomem, nostack, preserves_flags), ); } } @@ -319,45 +335,63 @@ pub use self::v8m::*; /// Baseline and Mainline. #[cfg(armv8m)] mod v8m { + use core::arch::asm; + #[inline(always)] pub unsafe fn __tt(mut target: u32) -> u32 { - asm!("tt {target}, {target}", target = inout(reg) target); + asm!( + "tt {target}, {target}", + target = inout(reg) target, + options(nomem, nostack, preserves_flags), + ); target } #[inline(always)] pub unsafe fn __ttt(mut target: u32) -> u32 { - asm!("ttt {target}, {target}", target = inout(reg) target); + asm!( + "ttt {target}, {target}", + target = inout(reg) target, + options(nomem, nostack, preserves_flags), + ); target } #[inline(always)] pub unsafe fn __tta(mut target: u32) -> u32 { - asm!("tta {target}, {target}", target = inout(reg) target); + asm!( + "tta {target}, {target}", + target = inout(reg) target, + options(nomem, nostack, preserves_flags), + ); target } #[inline(always)] pub unsafe fn __ttat(mut target: u32) -> u32 { - asm!("ttat {target}, {target}", target = inout(reg) target); + asm!( + "ttat {target}, {target}", + target = inout(reg) target, + options(nomem, nostack, preserves_flags), + ); target } #[inline(always)] pub unsafe fn __msp_ns_r() -> u32 { let r; - asm!("mrs {}, MSP_NS", out(reg) r); + asm!("mrs {}, MSP_NS", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __msp_ns_w(val: u32) { - asm!("msr MSP_NS, {}", in(reg) val); + asm!("msr MSP_NS, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __bxns(val: u32) { - asm!("BXNS {}", in(reg) val); + asm!("BXNS {}", in(reg) val, options(nomem, nostack, preserves_flags)); } } @@ -366,28 +400,30 @@ pub use self::v8m_main::*; /// Mainline only. #[cfg(armv8m_main)] mod v8m_main { + use core::arch::asm; + #[inline(always)] pub unsafe fn __msplim_r() -> u32 { let r; - asm!("mrs {}, MSPLIM", out(reg) r); + asm!("mrs {}, MSPLIM", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __msplim_w(val: u32) { - asm!("msr MSPLIM, {}", in(reg) val); + asm!("msr MSPLIM, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } #[inline(always)] pub unsafe fn __psplim_r() -> u32 { let r; - asm!("mrs {}, PSPLIM", out(reg) r); + asm!("mrs {}, PSPLIM", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __psplim_w(val: u32) { - asm!("msr PSPLIM, {}", in(reg) val); + asm!("msr PSPLIM, {}", in(reg) val, options(nomem, nostack, preserves_flags)); } } @@ -396,15 +432,17 @@ pub use self::fpu::*; /// All targets with FPU. #[cfg(has_fpu)] mod fpu { + use core::arch::asm; + #[inline(always)] pub unsafe fn __fpscr_r() -> u32 { let r; - asm!("vmrs {}, fpscr", out(reg) r); + asm!("vmrs {}, fpscr", out(reg) r, options(nomem, nostack, preserves_flags)); r } #[inline(always)] pub unsafe fn __fpscr_w(val: u32) { - asm!("vmsr fpscr, {}", in(reg) val); + asm!("vmsr fpscr, {}", in(reg) val, options(nomem, nostack)); } } @@ -34,6 +34,8 @@ #![no_std] #![crate_type = "staticlib"] #![deny(warnings)] +// Don't warn about feature(asm) being stable on Rust >= 1.59.0 +#![allow(stable_features)] mod inline; diff --git a/bin/thumbv6m-none-eabi-lto.a b/bin/thumbv6m-none-eabi-lto.a Binary files differindex 6136ec6..a203d7a 100644 --- a/bin/thumbv6m-none-eabi-lto.a +++ b/bin/thumbv6m-none-eabi-lto.a diff --git a/bin/thumbv6m-none-eabi.a b/bin/thumbv6m-none-eabi.a Binary files differindex c42f579..9640a69 100644 --- a/bin/thumbv6m-none-eabi.a +++ b/bin/thumbv6m-none-eabi.a diff --git a/bin/thumbv7em-none-eabi-lto.a b/bin/thumbv7em-none-eabi-lto.a Binary files differindex c2c040a..b34ac64 100644 --- a/bin/thumbv7em-none-eabi-lto.a +++ b/bin/thumbv7em-none-eabi-lto.a diff --git a/bin/thumbv7em-none-eabi.a b/bin/thumbv7em-none-eabi.a Binary files differindex 660360f..88acbdd 100644 --- a/bin/thumbv7em-none-eabi.a +++ b/bin/thumbv7em-none-eabi.a diff --git a/bin/thumbv7em-none-eabihf-lto.a b/bin/thumbv7em-none-eabihf-lto.a Binary files differindex eba1984..6de94bb 100644 --- a/bin/thumbv7em-none-eabihf-lto.a +++ b/bin/thumbv7em-none-eabihf-lto.a diff --git a/bin/thumbv7em-none-eabihf.a b/bin/thumbv7em-none-eabihf.a Binary files differindex 1561fa4..cf91a7a 100644 --- a/bin/thumbv7em-none-eabihf.a +++ b/bin/thumbv7em-none-eabihf.a diff --git a/bin/thumbv7m-none-eabi-lto.a b/bin/thumbv7m-none-eabi-lto.a Binary files differindex d964314..7f677a9 100644 --- a/bin/thumbv7m-none-eabi-lto.a +++ b/bin/thumbv7m-none-eabi-lto.a diff --git a/bin/thumbv7m-none-eabi.a b/bin/thumbv7m-none-eabi.a Binary files differindex f541274..ff4bf21 100644 --- a/bin/thumbv7m-none-eabi.a +++ b/bin/thumbv7m-none-eabi.a diff --git a/bin/thumbv8m.base-none-eabi-lto.a b/bin/thumbv8m.base-none-eabi-lto.a Binary files differindex 8a6ed42..f62acaf 100644 --- a/bin/thumbv8m.base-none-eabi-lto.a +++ b/bin/thumbv8m.base-none-eabi-lto.a diff --git a/bin/thumbv8m.base-none-eabi.a b/bin/thumbv8m.base-none-eabi.a Binary files differindex 33cd908..c0cc96c 100644 --- a/bin/thumbv8m.base-none-eabi.a +++ b/bin/thumbv8m.base-none-eabi.a diff --git a/bin/thumbv8m.main-none-eabi-lto.a b/bin/thumbv8m.main-none-eabi-lto.a Binary files differindex 8e6ff0a..1a51515 100644 --- a/bin/thumbv8m.main-none-eabi-lto.a +++ b/bin/thumbv8m.main-none-eabi-lto.a diff --git a/bin/thumbv8m.main-none-eabi.a b/bin/thumbv8m.main-none-eabi.a Binary files differindex 898fea7..d017a15 100644 --- a/bin/thumbv8m.main-none-eabi.a +++ b/bin/thumbv8m.main-none-eabi.a diff --git a/bin/thumbv8m.main-none-eabihf-lto.a b/bin/thumbv8m.main-none-eabihf-lto.a Binary files differindex d9a636a..fd3dc92 100644 --- a/bin/thumbv8m.main-none-eabihf-lto.a +++ b/bin/thumbv8m.main-none-eabihf-lto.a diff --git a/bin/thumbv8m.main-none-eabihf.a b/bin/thumbv8m.main-none-eabihf.a Binary files differindex b0513b7..223ff1d 100644 --- a/bin/thumbv8m.main-none-eabihf.a +++ b/bin/thumbv8m.main-none-eabihf.a @@ -76,6 +76,8 @@ // - A generated #[derive(Debug)] function (in which case the attribute needs // to be applied to the struct). #![deny(clippy::missing_inline_in_public_items)] +// Don't warn about feature(asm) being stable on Rust >= 1.59.0 +#![allow(stable_features)] extern crate bare_metal; extern crate volatile_register; |