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author | 2017-12-21 09:45:52 +0100 | |
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committer | 2017-12-21 09:45:52 +0100 | |
commit | 9a80bae79d1eb9111e50406cb7cc088246deb04d (patch) | |
tree | 62b84f8e264811a9d5f6f02286c3bdc3e3532c5e | |
parent | 4689992eace79c49fecac4a51323f0c0dcc1e812 (diff) | |
download | cortex-m-9a80bae79d1eb9111e50406cb7cc088246deb04d.tar.gz cortex-m-9a80bae79d1eb9111e50406cb7cc088246deb04d.tar.zst cortex-m-9a80bae79d1eb9111e50406cb7cc088246deb04d.zip |
document `set_fpu_access_mode` footgun
closes #44
-rw-r--r-- | src/peripheral/scb.rs | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 188f3b7..2a98618 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -78,6 +78,11 @@ impl RegisterBlock { } /// Sets FPU access mode + /// + /// *IMPORTANT* Any function that runs fully or partly with the FPU disabled must *not* take any + /// floating-point arguments or have any floating-point local variables. Because the compiler + /// might inline such a function into a caller that does have floating-point arguments or + /// variables, any such function must be also marked #[inline(never)]. pub fn set_fpu_access_mode(&self, mode: FpuAccessMode) { let mut cpacr = self.cpacr.read() & !SCB_CPACR_FPU_MASK; match mode { |