Format everything

16 files changed, 36 insertions, 26 deletions

diff --git a/asm/inline.rs b/asm/inline.rs
index 688604e..f6a3ebb 100644
--- a/asm/inline.rs
+++ b/asm/inline.rs
@@ -6,7 +6,7 @@
 //! All of these functions should be blanket-`unsafe`. `cortex-m` provides safe wrappers where
 //! applicable.
 
-use core::sync::atomic::{Ordering, compiler_fence};
+use core::sync::atomic::{compiler_fence, Ordering};
 
 #[inline(always)]
 pub unsafe fn __bkpt() {
@@ -187,7 +187,7 @@ pub unsafe fn __syscall(mut nr: u32, arg: u32) -> u32 {
 pub use self::v7m::*;
 #[cfg(any(armv7m, armv8m_main))]
 mod v7m {
-    use core::sync::atomic::{Ordering, compiler_fence};
+    use core::sync::atomic::{compiler_fence, Ordering};
 
     #[inline(always)]
     pub unsafe fn __basepri_max(val: u8) {
diff --git a/bin/thumbv6m-none-eabi-lto.a b/bin/thumbv6m-none-eabi-lto.a
index 93d2953..f7c31d3 100644
--- a/bin/thumbv6m-none-eabi-lto.a
+++ b/bin/thumbv6m-none-eabi-lto.a
diff --git a/bin/thumbv7em-none-eabi-lto.a b/bin/thumbv7em-none-eabi-lto.a
index 608cbf1..d2d6b00 100644
--- a/bin/thumbv7em-none-eabi-lto.a
+++ b/bin/thumbv7em-none-eabi-lto.a
diff --git a/bin/thumbv7em-none-eabihf-lto.a b/bin/thumbv7em-none-eabihf-lto.a
index feecade..cea5763 100644
--- a/bin/thumbv7em-none-eabihf-lto.a
+++ b/bin/thumbv7em-none-eabihf-lto.a
diff --git a/bin/thumbv7m-none-eabi-lto.a b/bin/thumbv7m-none-eabi-lto.a
index bf84238..5a51123 100644
--- a/bin/thumbv7m-none-eabi-lto.a
+++ b/bin/thumbv7m-none-eabi-lto.a
diff --git a/bin/thumbv8m.base-none-eabi-lto.a b/bin/thumbv8m.base-none-eabi-lto.a
index 559bf13..9e10b8e 100644
--- a/bin/thumbv8m.base-none-eabi-lto.a
+++ b/bin/thumbv8m.base-none-eabi-lto.a
diff --git a/bin/thumbv8m.main-none-eabi-lto.a b/bin/thumbv8m.main-none-eabi-lto.a
index 1a381f8..69d58e5 100644
--- a/bin/thumbv8m.main-none-eabi-lto.a
+++ b/bin/thumbv8m.main-none-eabi-lto.a
diff --git a/bin/thumbv8m.main-none-eabihf-lto.a b/bin/thumbv8m.main-none-eabihf-lto.a
index ab82609..6ec3bd8 100644
--- a/bin/thumbv8m.main-none-eabihf-lto.a
+++ b/bin/thumbv8m.main-none-eabihf-lto.a
diff --git a/cortex-m-semihosting/src/hio.rs b/cortex-m-semihosting/src/hio.rs
index b0ca2fb..b6b6c7b 100644
--- a/cortex-m-semihosting/src/hio.rs
+++ b/cortex-m-semihosting/src/hio.rs
@@ -1,7 +1,7 @@
 //! Host I/O
 
-use core::{fmt, slice};
 use crate::nr;
+use core::{fmt, slice};
 
 /// A byte stream to the host (e.g., host's stdout or stderr).
 #[derive(Clone, Copy)]
@@ -38,8 +38,7 @@ pub fn hstdout() -> Result<HostStream, ()> {
 
 fn open(name: &str, mode: usize) -> Result<HostStream, ()> {
     let name = name.as_bytes();
-    match unsafe { syscall!(OPEN, name.as_ptr(), mode, name.len() - 1) } as
-        isize {
+    match unsafe { syscall!(OPEN, name.as_ptr(), mode, name.len() - 1) } as isize {
         -1 => Err(()),
         fd => Ok(HostStream { fd: fd as usize }),
     }
@@ -53,9 +52,7 @@ fn write_all(fd: usize, mut buffer: &[u8]) -> Result<(), ()> {
             // `n` bytes were not written
             n if n <= buffer.len() => {
                 let offset = (buffer.len() - n) as isize;
-                buffer = unsafe {
-                    slice::from_raw_parts(buffer.as_ptr().offset(offset), n)
-                }
+                buffer = unsafe { slice::from_raw_parts(buffer.as_ptr().offset(offset), n) }
             }
             #[cfg(feature = "jlink-quirks")]
             // Error (-1) - should be an error but JLink can return -1, -2, -3,...
diff --git a/cortex-m-semihosting/src/lib.rs b/cortex-m-semihosting/src/lib.rs
index de52ae1..05455ce 100644
--- a/cortex-m-semihosting/src/lib.rs
+++ b/cortex-m-semihosting/src/lib.rs
@@ -218,9 +218,7 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
         }
 
         #[cfg(all(thumb, feature = "no-semihosting"))]
-        () => {
-            0
-        }
+        () => 0,
 
         #[cfg(not(thumb))]
         () => unimplemented!(),
diff --git a/cortex-m-semihosting/src/macros.rs b/cortex-m-semihosting/src/macros.rs
index d10cd3f..f1cc4f3 100644
--- a/cortex-m-semihosting/src/macros.rs
+++ b/cortex-m-semihosting/src/macros.rs
@@ -11,12 +11,13 @@ macro_rules! syscall {
         $crate::syscall($crate::nr::$nr, &[$a1 as usize, $a2 as usize])
     };
     ($nr:ident, $a1:expr, $a2:expr, $a3:expr) => {
-        $crate::syscall($crate::nr::$nr, &[$a1 as usize, $a2 as usize,
-                                           $a3 as usize])
+        $crate::syscall($crate::nr::$nr, &[$a1 as usize, $a2 as usize, $a3 as usize])
     };
     ($nr:ident, $a1:expr, $a2:expr, $a3:expr, $a4:expr) => {
-        $crate::syscall($crate::nr::$nr, &[$a1 as usize, $a2 as usize,
-                                           $a3 as usize, $a4 as usize])
+        $crate::syscall(
+            $crate::nr::$nr,
+            &[$a1 as usize, $a2 as usize, $a3 as usize, $a4 as usize],
+        )
     };
 }
 
diff --git a/src/delay.rs b/src/delay.rs
index 051151f..2f5b8e0 100644
--- a/src/delay.rs
+++ b/src/delay.rs
@@ -17,7 +17,10 @@ impl Delay {
     pub fn new(mut syst: SYST, ahb_frequency: u32) -> Self {
         syst.set_clock_source(SystClkSource::Core);
 
-        Delay { syst, ahb_frequency }
+        Delay {
+            syst,
+            ahb_frequency,
+        }
     }
 
     /// Releases the system timer (SysTick) resource.
diff --git a/src/interrupt.rs b/src/interrupt.rs
index ad76ff2..b5fcab6 100644
--- a/src/interrupt.rs
+++ b/src/interrupt.rs
@@ -25,7 +25,10 @@ pub unsafe trait InterruptNumber: Copy {
 
 /// Implement InterruptNumber for the old bare_metal::Nr trait.
 /// This implementation is for backwards compatibility only and will be removed in cortex-m 0.8.
-#[deprecated(since="0.7.0", note="Please update your PAC to one using the latest svd2rust")]
+#[deprecated(
+    since = "0.7.0",
+    note = "Please update your PAC to one using the latest svd2rust"
+)]
 unsafe impl<T: Nr + Copy> InterruptNumber for T {
     fn number(self) -> u16 {
         self.nr() as u16
diff --git a/src/itm.rs b/src/itm.rs
index 32d3caf..f4acdb9 100644
--- a/src/itm.rs
+++ b/src/itm.rs
@@ -140,9 +140,7 @@ pub fn write_all(port: &mut Stim, buffer: &[u8]) {
 /// ```
 #[allow(clippy::missing_inline_in_public_items)]
 pub fn write_aligned(port: &mut Stim, buffer: &Aligned<[u8]>) {
-    unsafe {
-        write_aligned_impl(port, &buffer.0)
-    }
+    unsafe { write_aligned_impl(port, &buffer.0) }
 }
 
 /// Writes `fmt::Arguments` to the ITM `port`
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs
index 45bd5d2..5689cb4 100644
--- a/src/peripheral/dcb.rs
+++ b/src/peripheral/dcb.rs
@@ -2,8 +2,8 @@
 
 use volatile_register::{RW, WO};
 
-use core::ptr;
 use crate::peripheral::DCB;
+use core::ptr;
 
 const DCB_DEMCR_TRCENA: u32 = 1 << 24;
 
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index 001bb14..1b25b5f 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -339,7 +339,9 @@ impl SCB {
         // NOTE(unsafe): The asm routine manages exclusive access to the SCB
         // registers and applies the proper barriers; it is technically safe on
         // its own, and is only `unsafe` here because it's `extern "C"`.
-        unsafe { __enable_icache(); }
+        unsafe {
+            __enable_icache();
+        }
     }
 
     /// Disables I-cache if currently enabled.
@@ -412,7 +414,9 @@ impl SCB {
         // NOTE(unsafe): The asm routine manages exclusive access to the SCB
         // registers and applies the proper barriers; it is technically safe on
         // its own, and is only `unsafe` here because it's `extern "C"`.
-        unsafe { __enable_dcache(); }
+        unsafe {
+            __enable_dcache();
+        }
     }
 
     /// Disables D-cache if currently enabled.
@@ -960,7 +964,7 @@ impl SCB {
 
             // NOTE(unsafe): Index is bounded to [4,15] by SystemHandler design.
             // TODO: Review it after rust-lang/rust/issues/13926 will be fixed.
-            let priority_ref = unsafe {(*Self::ptr()).shpr.get_unchecked(usize::from(index - 4))};
+            let priority_ref = unsafe { (*Self::ptr()).shpr.get_unchecked(usize::from(index - 4)) };
 
             priority_ref.read()
         }
@@ -971,7 +975,11 @@ impl SCB {
 
             // NOTE(unsafe): Index is bounded to [11,15] by SystemHandler design.
             // TODO: Review it after rust-lang/rust/issues/13926 will be fixed.
-            let priority_ref = unsafe {(*Self::ptr()).shpr.get_unchecked(usize::from((index - 8) / 4))};
+            let priority_ref = unsafe {
+                (*Self::ptr())
+                    .shpr
+                    .get_unchecked(usize::from((index - 8) / 4))
+            };
 
             let shpr = priority_ref.read();
             let prio = (shpr >> (8 * (index % 4))) & 0x0000_00ff;
@@ -1008,7 +1016,9 @@ impl SCB {
         {
             // NOTE(unsafe): Index is bounded to [11,15] by SystemHandler design.
             // TODO: Review it after rust-lang/rust/issues/13926 will be fixed.
-            let priority_ref = (*Self::ptr()).shpr.get_unchecked(usize::from((index - 8) / 4));
+            let priority_ref = (*Self::ptr())
+                .shpr
+                .get_unchecked(usize::from((index - 8) / 4));
 
             priority_ref.modify(|value| {
                 let shift = 8 * (index % 4);