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| author |  Brandon Matthews <bmatthews@zipcar.com>
| 2018-08-14 11:20:54 -0700 |
|---|---|---|
| committer |  Brandon Matthews <bmatthews@optimaltour.us>
| 2019-03-12 12:27:57 -0700 |
| commit | cc5ea7f4abc3fb35507479deccdb6ce8aa517526 (patch) | |
| tree | 506e8ddc3b4f80e3ad43e487165457a1b289e45d | |
| parent | 33a5fa088c0b0bedca6216ab676c599bd9a3ce69 (diff) | |
| download | cortex-m-cc5ea7f4abc3fb35507479deccdb6ce8aa517526.tar.gz cortex-m-cc5ea7f4abc3fb35507479deccdb6ce8aa517526.tar.zst cortex-m-cc5ea7f4abc3fb35507479deccdb6ce8aa517526.zip | |
Exclude unused import and elide nvic::request for armv6m
| -rw-r--r-- | src/peripheral/nvic.rs | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/peripheral/nvic.rs b/src/peripheral/nvic.rs index 750565e..ceda1a1 100644 --- a/src/peripheral/nvic.rs +++ b/src/peripheral/nvic.rs @@ -1,8 +1,8 @@ //! Nested Vector Interrupt Controller #[cfg(not(armv6m))] -use volatile_register::RO; -use volatile_register::{RW, WO}; +use volatile_register::{RO, WO}; +use volatile_register::RW; use interrupt::Nr; use peripheral::NVIC; @@ -78,6 +78,7 @@ pub struct RegisterBlock { } impl NVIC { + #[cfg(not(armv6m))] /// Request an IRQ in software /// /// Writing a value to the INTID field is the same as manually pending an interrupt by setting |