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authorGravatar Jorge Aparicio <jorge@japaric.io> 2018-10-27 14:19:28 +0200
committerGravatar Jorge Aparicio <jorge@japaric.io> 2018-11-14 01:32:37 +0100
commite883c5e962dd7fb420554787010df7f1a10c9926 (patch)
tree11f602960fb964d44d87eccea8c445abef5b2cf1
parent3f2031c2889e7f6a581e476b8cf918f1cfa14de0 (diff)
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cortex-m-e883c5e962dd7fb420554787010df7f1a10c9926.tar.zst
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rename UserHardFault to HardFault
so it matches the exception name (`#[exception] fn HardFault(..`)
-rw-r--r--cortex-m-rt/asm.s10
-rw-r--r--cortex-m-rt/bin/thumbv6m-none-eabi.abin882 -> 920 bytes
-rw-r--r--cortex-m-rt/bin/thumbv7em-none-eabi.abin882 -> 920 bytes
-rw-r--r--cortex-m-rt/bin/thumbv7em-none-eabihf.abin882 -> 920 bytes
-rw-r--r--cortex-m-rt/bin/thumbv7m-none-eabi.abin882 -> 920 bytes
-rw-r--r--cortex-m-rt/link.x.in8
-rw-r--r--cortex-m-rt/macros/src/lib.rs4
-rw-r--r--cortex-m-rt/src/lib.rs18
8 files changed, 20 insertions, 20 deletions
diff --git a/cortex-m-rt/asm.s b/cortex-m-rt/asm.s
index 4636bc3..1f0e74d 100644
--- a/cortex-m-rt/asm.s
+++ b/cortex-m-rt/asm.s
@@ -1,10 +1,10 @@
# LLD requires that the section flags are explicitly set here
- .section .HardFault, "ax"
- .global HardFault
+ .section .HardFaultTrampoline, "ax"
+ .global HardFaultTrampoline
# .type and .thumb_func are both required; otherwise its Thumb bit does not
# get set and an invalid vector table is generated
- .type HardFault,%function
+ .type HardFaultTrampoline,%function
.thumb_func
-HardFault:
+HardFaultTrampoline:
mrs r0, MSP
- b UserHardFault
+ b HardFault
diff --git a/cortex-m-rt/bin/thumbv6m-none-eabi.a b/cortex-m-rt/bin/thumbv6m-none-eabi.a
index 9857abc..5938e99 100644
--- a/cortex-m-rt/bin/thumbv6m-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv6m-none-eabi.a
Binary files differ
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabi.a b/cortex-m-rt/bin/thumbv7em-none-eabi.a
index 3f8b8fe..fc426f9 100644
--- a/cortex-m-rt/bin/thumbv7em-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv7em-none-eabi.a
Binary files differ
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabihf.a b/cortex-m-rt/bin/thumbv7em-none-eabihf.a
index 3f8b8fe..fc426f9 100644
--- a/cortex-m-rt/bin/thumbv7em-none-eabihf.a
+++ b/cortex-m-rt/bin/thumbv7em-none-eabihf.a
Binary files differ
diff --git a/cortex-m-rt/bin/thumbv7m-none-eabi.a b/cortex-m-rt/bin/thumbv7m-none-eabi.a
index 43c843e..3359875 100644
--- a/cortex-m-rt/bin/thumbv7m-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv7m-none-eabi.a
Binary files differ
diff --git a/cortex-m-rt/link.x.in b/cortex-m-rt/link.x.in
index e6e0d3b..dff43e0 100644
--- a/cortex-m-rt/link.x.in
+++ b/cortex-m-rt/link.x.in
@@ -35,7 +35,7 @@ EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */
EXTERN(DefaultHandler);
PROVIDE(NonMaskableInt = DefaultHandler);
-EXTERN(HardFault);
+EXTERN(HardFaultTrampoline);
PROVIDE(MemoryManagement = DefaultHandler);
PROVIDE(BusFault = DefaultHandler);
PROVIDE(UsageFault = DefaultHandler);
@@ -46,7 +46,7 @@ PROVIDE(PendSV = DefaultHandler);
PROVIDE(SysTick = DefaultHandler);
PROVIDE(DefaultHandler = DefaultHandler_);
-PROVIDE(UserHardFault = UserHardFault_);
+PROVIDE(HardFault = HardFault_);
/* # Interrupt vectors */
EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
@@ -86,8 +86,8 @@ SECTIONS
.text _stext :
{
*(.text .text.*);
- *(.HardFault);
- *(.UserHardFault);
+ *(.HardFaultTrampoline);
+ *(.HardFault.*);
} > FLASH
/* ### .rodata */
diff --git a/cortex-m-rt/macros/src/lib.rs b/cortex-m-rt/macros/src/lib.rs
index dfa936b..1013f5e 100644
--- a/cortex-m-rt/macros/src/lib.rs
+++ b/cortex-m-rt/macros/src/lib.rs
@@ -397,8 +397,8 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream {
let pat = &arg.pat;
quote!(
- #[export_name = "UserHardFault"]
- #[link_section = ".UserHardFault"]
+ #[export_name = "HardFault"]
+ #[link_section = ".HardFault.user"]
#(#attrs)*
pub #unsafety extern "C" fn #hash(#arg) -> ! {
extern crate cortex_m_rt;
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs
index f418e7f..9f2a20a 100644
--- a/cortex-m-rt/src/lib.rs
+++ b/cortex-m-rt/src/lib.rs
@@ -203,12 +203,12 @@
//! - `DefaultHandler`. This is the default handler. If not overridden using `#[exception] fn
//! DefaultHandler(..` this will be an infinite loop.
//!
-//! - `HardFault`. This is the hard fault handler. This function is simply a trampoline that jumps
-//! into the user defined hard fault handler named `UserHardFault`. The trampoline is required to
-//! set up the pointer to the stacked exception frame.
+//! - `HardFaultTrampoline`. This is the real hard fault handler. This function is simply a
+//! trampoline that jumps into the user defined hard fault handler named `HardFault`. The
+//! trampoline is required to set up the pointer to the stacked exception frame.
//!
-//! - `UserHardFault`. This is the user defined hard fault handler. If not overridden using
-//! `#[exception] fn HardFault(..` this will be an infinite loop.
+//! - `HardFault`. This is the user defined hard fault handler. If not overridden using
+//! `#[exception] fn HardFault(..` it will default to an infinite loop.
//!
//! - `__STACK_START`. This is the first entry in the `.vector_table` section. This symbol contains
//! the initial value of the stack pointer; this is where the stack will be located -- the stack
@@ -534,9 +534,9 @@ pub unsafe extern "C" fn Reset() -> ! {
#[allow(unused_variables)]
#[doc(hidden)]
-#[link_section = ".UserHardFault"]
+#[link_section = ".HardFault.default"]
#[no_mangle]
-pub unsafe extern "C" fn UserHardFault_(ef: &ExceptionFrame) -> ! {
+pub unsafe extern "C" fn HardFault_(ef: &ExceptionFrame) -> ! {
loop {
// add some side effect to prevent this from turning into a UDF instruction
// see rust-lang/rust#28728 for details
@@ -590,7 +590,7 @@ pub enum Exception {
extern "C" {
fn NonMaskableInt();
- fn HardFault();
+ fn HardFaultTrampoline();
#[cfg(not(armv6m))]
fn MemoryManagement();
@@ -629,7 +629,7 @@ pub static __EXCEPTIONS: [Vector; 14] = [
handler: NonMaskableInt,
},
// Exception 3: Hard Fault Interrupt.
- Vector { handler: HardFault },
+ Vector { handler: HardFaultTrampoline },
// Exception 4: Memory Management Interrupt [not on Cortex-M0 variants].
#[cfg(not(armv6m))]
Vector {