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| author |  bors[bot] <26634292+bors[bot]@users.noreply.github.com>
| 2021-07-25 22:05:30 +0000 |
|---|---|---|
| committer |  GitHub <noreply@github.com>
| 2021-07-25 22:05:30 +0000 |
| commit | ea91f18004a408f763a7d11532cdc7e14c62d80c (patch) | |
| tree | f8f348ff8fb221bcb4b56597424477751416f66e | |
| parent | 45e7ab72661a8823e98e8fba821f2addcea95d3f (diff) | |
| parent | 7042622bfb844611c9cdbaf1196fa76362a32a6e (diff) | |
| download | cortex-m-ea91f18004a408f763a7d11532cdc7e14c62d80c.tar.gz cortex-m-ea91f18004a408f763a7d11532cdc7e14c62d80c.tar.zst cortex-m-ea91f18004a408f763a7d11532cdc7e14c62d80c.zip | |
Merge #346
346: Add pre-requisites for enabling the cycle counter to docs r=adamgreig a=newAM
I think adding a note here about per-requisites for the cycle counter is a good idea.
Reference: https://developer.arm.com/documentation/ddi0403/d/Debug-Architecture/ARMv7-M-Debug/Debug-register-support-in-the-SCS/Debug-Exception-and-Monitor-Control-Register--DEMCR?lang=en#BCGJGAGC
This may just be a me issue, I always forget to set the global trace enable when I go to use the cycle counter. Feel free to close if you think this is a non-issue.
Co-authored-by: Alex Martens <alexmgit@protonmail.com>
| -rw-r--r-- | src/peripheral/dwt.rs | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/peripheral/dwt.rs b/src/peripheral/dwt.rs index 043223a..8e376a8 100644 --- a/src/peripheral/dwt.rs +++ b/src/peripheral/dwt.rs @@ -64,6 +64,13 @@ pub struct Comparator { impl DWT { /// Enables the cycle counter + /// + /// The global trace enable ([`DCB::enable_trace`]) should be set before + /// enabling the cycle counter, the processor may ignore writes to the + /// cycle counter enable if the global trace is disabled + /// (implementation defined behaviour). + /// + /// [`DCB::enable_trace`]: crate::peripheral::DCB::enable_trace #[cfg(not(armv6m))] #[inline] pub fn enable_cycle_counter(&mut self) { |