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author | 2020-10-02 17:12:43 +0100 | |
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committer | 2020-10-02 17:39:36 +0100 | |
commit | 7102bd4c048d96f65f79f32c1f0b1c59e1a32a51 (patch) | |
tree | 06c7b191bc4d92137762ba88a8aa072426d36bda /asm/inline.rs | |
parent | 43b9383cbedc5b0fb0b2df51df0e7af742fb7b61 (diff) | |
download | cortex-m-7102bd4c048d96f65f79f32c1f0b1c59e1a32a51.tar.gz cortex-m-7102bd4c048d96f65f79f32c1f0b1c59e1a32a51.tar.zst cortex-m-7102bd4c048d96f65f79f32c1f0b1c59e1a32a51.zip |
Add some Armv8-M assembly routines
Adds access to MSP_NS and the BXNS instruction.
Also adds __dsb which was missing.
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
Diffstat (limited to 'asm/inline.rs')
-rw-r--r-- | asm/inline.rs | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/asm/inline.rs b/asm/inline.rs index 3fbba92..9a0c66e 100644 --- a/asm/inline.rs +++ b/asm/inline.rs @@ -308,6 +308,23 @@ mod v8m { asm!("ttat {target}, {target}", target = inout(reg) target); target } + + #[inline(always)] + pub unsafe fn __msp_ns_r() -> u32 { + let r; + asm!("mrs {}, MSP_NS", out(reg) r); + r + } + + #[inline(always)] + pub unsafe fn __msp_ns_w(val: u32) { + asm!("msr MSP_NS, {}", in(reg) val); + } + + #[inline(always)] + pub unsafe fn __bxns(val: u32) { + asm!("BXNS {}", in(reg) val); + } } #[cfg(armv8m_main)] |