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author | 2018-05-11 22:24:37 +0200 | |
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committer | 2018-05-11 22:32:31 +0200 | |
commit | c3dbc7225d666043a57ca0cb36b32e938a06c7e6 (patch) | |
tree | 42ed30b926061a9edb88b19286649ca81e8d9554 /cortex-m-rt/build.rs | |
parent | 7719662f287a8fc184b59822fb90d2297a72ea15 (diff) | |
download | cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.tar.gz cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.tar.zst cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.zip |
add CI, add device specific check of the vector table size, ..
- document the `main` symbol as an alternative to `entry!`
- document `ResetTrampoline`
- fix: `PendSV` is available on ARMv6-M
- document that `entry!` and `exception!` must be called from accessible modules.
- add a deny lint to `entry!` and `exception!` to prevent them from being invoked from inaccessible
modules.
Diffstat (limited to 'cortex-m-rt/build.rs')
-rw-r--r-- | cortex-m-rt/build.rs | 35 |
1 files changed, 27 insertions, 8 deletions
diff --git a/cortex-m-rt/build.rs b/cortex-m-rt/build.rs index 1098dca..1b5c3d1 100644 --- a/cortex-m-rt/build.rs +++ b/cortex-m-rt/build.rs @@ -9,7 +9,7 @@ fn main() { let target = env::var("TARGET").unwrap(); has_fpu(&target); - is_armv6m(&target); + let is_armv6m = is_armv6m(&target); if target.starts_with("thumbv") { cc::Build::new().file("asm.s").compile("asm"); @@ -17,8 +17,8 @@ fn main() { // Put the linker script somewhere the linker can find it let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - let link_x = include_bytes!("link.x"); - if env::var_os("CARGO_FEATURE_DEVICE").is_some() { + let link_x = include_bytes!("link.x.in"); + let mut f = if env::var_os("CARGO_FEATURE_DEVICE").is_some() { let mut f = File::create(out.join("link.x")).unwrap(); writeln!( @@ -29,12 +29,28 @@ fn main() { INCLUDE device.x"# ).unwrap(); f.write_all(link_x).unwrap(); + f } else { - File::create(out.join("link.x")) - .unwrap() - .write_all(link_x) - .unwrap(); + let mut f = File::create(out.join("link.x")).unwrap(); + f.write_all(link_x).unwrap(); + f }; + + let max_int_handlers = if is_armv6m { 32 } else { 240 }; + + // checking the size of the interrupts portion of the vector table is sub-architecture dependent + writeln!( + f, + r#" +ASSERT(__einterrupts - __eexceptions <= 0x{:x}, " +There can't be more than {} interrupt handlers. This may be a bug in +your device crate, or you may have registered more than 240 interrupt +handlers."); +"#, + max_int_handlers * 4, + max_int_handlers + ).unwrap(); + println!("cargo:rustc-link-search={}", out.display()); println!("cargo:rerun-if-changed=build.rs"); @@ -47,8 +63,11 @@ fn has_fpu(target: &str) { } } -fn is_armv6m(target: &str) { +fn is_armv6m(target: &str) -> bool { if target.starts_with("thumbv6m-") { println!("cargo:rustc-cfg=armv6m"); + true + } else { + false } } |