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authorGravatar Jorge Aparicio <jorge@japaric.io> 2018-05-11 22:24:37 +0200
committerGravatar Jorge Aparicio <jorge@japaric.io> 2018-05-11 22:32:31 +0200
commitc3dbc7225d666043a57ca0cb36b32e938a06c7e6 (patch)
tree42ed30b926061a9edb88b19286649ca81e8d9554 /cortex-m-rt/examples/device.rs
parent7719662f287a8fc184b59822fb90d2297a72ea15 (diff)
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add CI, add device specific check of the vector table size, ..
- document the `main` symbol as an alternative to `entry!` - document `ResetTrampoline` - fix: `PendSV` is available on ARMv6-M - document that `entry!` and `exception!` must be called from accessible modules. - add a deny lint to `entry!` and `exception!` to prevent them from being invoked from inaccessible modules.
Diffstat (limited to 'cortex-m-rt/examples/device.rs')
-rw-r--r--cortex-m-rt/examples/device.rs50
1 files changed, 50 insertions, 0 deletions
diff --git a/cortex-m-rt/examples/device.rs b/cortex-m-rt/examples/device.rs
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+//! Manually create the interrupts portion of the vector table
+
+#![deny(unsafe_code)]
+#![deny(warnings)]
+#![no_main]
+#![no_std]
+
+#[macro_use(entry, exception)]
+extern crate cortex_m_rt as rt;
+extern crate panic_semihosting;
+
+use rt::ExceptionFrame;
+
+// the program entry point
+entry!(main);
+
+fn main() -> ! {
+ loop {}
+}
+
+// the hard fault handler
+exception!(HardFault, hard_fault);
+
+fn hard_fault(_ef: &ExceptionFrame) -> ! {
+ loop {}
+}
+
+// the default exception handler
+exception!(*, default_handler);
+
+fn default_handler(_irqn: i16) {}
+
+// interrupts portion of the vector table
+pub union Vector {
+ handler: unsafe extern "C" fn(),
+ reserved: usize,
+}
+
+extern "C" {
+ fn WWDG();
+ fn PVD();
+}
+
+#[link_section = ".vector_table.interrupts"]
+#[no_mangle]
+pub static __INTERRUPTS: [Vector; 3] = [
+ Vector { handler: WWDG },
+ Vector { reserved: 0 },
+ Vector { handler: PVD },
+];