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author | 2018-05-11 22:24:37 +0200 | |
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committer | 2018-05-11 22:32:31 +0200 | |
commit | c3dbc7225d666043a57ca0cb36b32e938a06c7e6 (patch) | |
tree | 42ed30b926061a9edb88b19286649ca81e8d9554 /cortex-m-rt/examples/state.rs | |
parent | 7719662f287a8fc184b59822fb90d2297a72ea15 (diff) | |
download | cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.tar.gz cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.tar.zst cortex-m-c3dbc7225d666043a57ca0cb36b32e938a06c7e6.zip |
add CI, add device specific check of the vector table size, ..
- document the `main` symbol as an alternative to `entry!`
- document `ResetTrampoline`
- fix: `PendSV` is available on ARMv6-M
- document that `entry!` and `exception!` must be called from accessible modules.
- add a deny lint to `entry!` and `exception!` to prevent them from being invoked from inaccessible
modules.
Diffstat (limited to 'cortex-m-rt/examples/state.rs')
-rw-r--r-- | cortex-m-rt/examples/state.rs | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/cortex-m-rt/examples/state.rs b/cortex-m-rt/examples/state.rs new file mode 100644 index 0000000..0b5eeeb --- /dev/null +++ b/cortex-m-rt/examples/state.rs @@ -0,0 +1,38 @@ +//! Preserving state across executions of an exception handler + +#![deny(unsafe_code)] +#![deny(warnings)] +#![no_main] +#![no_std] + +#[macro_use(entry, exception)] +extern crate cortex_m_rt as rt; +extern crate panic_semihosting; + +use rt::ExceptionFrame; + +// the program entry point +entry!(main); + +fn main() -> ! { + loop {} +} + +// exception handler with state +exception!(SysTick, sys_tick, state: u32 = 0); + +fn sys_tick(state: &mut u32) { + *state += 1; +} + +// the hard fault handler +exception!(HardFault, hard_fault); + +fn hard_fault(_ef: &ExceptionFrame) -> ! { + loop {} +} + +// the default exception handler +exception!(*, default_handler); + +fn default_handler(_irqn: i16) {} |