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authorGravatar Norbert Fabritius <norbert.fabritius@esrlabs.com> 2023-01-11 13:34:38 +0100
committerGravatar Adam Greig <adam@adamgreig.com> 2023-02-17 18:21:29 +0000
commit4bf9ef46bae593974e00b3ca072341586d492164 (patch)
tree562c73b8aebfd1238c30891da6d30c38552fe2d6 /cortex-m-rt/src/lib.rs
parent26cae65548eb2c594427caf4a9638e0fdc4f1ba1 (diff)
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zero-init-ram: Expand comment above asm code
Diffstat (limited to 'cortex-m-rt/src/lib.rs')
-rw-r--r--cortex-m-rt/src/lib.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs
index f9df60a..6f9f299 100644
--- a/cortex-m-rt/src/lib.rs
+++ b/cortex-m-rt/src/lib.rs
@@ -521,8 +521,8 @@ cfg_global_asm! {
"ldr r0, =_stack_start
msr msp, r0",
- // If enabled, initialize RAM with zeros. This is normally not necessary but might be required
- // on custom hardware.
+ // If enabled, initialize RAM with zeros. This is not usually required, but might be necessary
+ // to properly initialize checksum-based memory integrity measures on safety-critical hardware.
#[cfg(feature = "zero-init-ram")]
"ldr r0, =_ram_start
ldr r1, =_ram_end