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| author |  Jorge Aparicio <jorge@japaric.io>
| 2018-05-11 20:59:18 +0200 |
|---|---|---|
| committer | Jorge Aparicio <jorge@japaric.io>
| 2018-05-11 20:59:18 +0200 |
| commit | 7719662f287a8fc184b59822fb90d2297a72ea15 (patch) | |
| tree | a1c8a1fc97dc496db5bd69aea9b5410c620cd463 /cortex-m-rt/src/lib.rs | |
| parent | 962d91c8be5abb71f5dbd54f6e82ace93fd69474 (diff) | |
| download | cortex-m-7719662f287a8fc184b59822fb90d2297a72ea15.tar.gz cortex-m-7719662f287a8fc184b59822fb90d2297a72ea15.tar.zst cortex-m-7719662f287a8fc184b59822fb90d2297a72ea15.zip | |
ARMv6-M can only have 32 interrupts
Diffstat (limited to 'cortex-m-rt/src/lib.rs')
| -rw-r--r-- | cortex-m-rt/src/lib.rs | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs index a5e3856..4bb5fe1 100644 --- a/cortex-m-rt/src/lib.rs +++ b/cortex-m-rt/src/lib.rs @@ -571,7 +571,7 @@ pub static __EXCEPTIONS: [Vector; 14] = [ // If we are not targeting a specific device we bind all the potential device specific interrupts // to the default handler -#[cfg(not(feature = "device"))] +#[cfg(all(not(feature = "device"), not(armv6m)))] #[doc(hidden)] #[link_section = ".vector_table.interrupts"] #[no_mangle] @@ -583,6 +583,19 @@ pub static __INTERRUPTS: [unsafe extern "C" fn(); 240] = [{ DefaultHandler }; 240]; +// ARMv6-M can only have a maximum of 32 device specific interrupts +#[cfg(all(not(feature = "device"), armv6m))] +#[doc(hidden)] +#[link_section = ".vector_table.interrupts"] +#[no_mangle] +pub static __INTERRUPTS: [unsafe extern "C" fn(); 32] = [{ + extern "C" { + fn DefaultHandler(); + } + + DefaultHandler +}; 32]; + /// Macro to set or override a processor core exception handler /// /// # Syntax |