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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2023-02-14 01:51:13 +0000
committerGravatar GitHub <noreply@github.com> 2023-02-14 01:51:13 +0000
commitbba5c338b7d72dc1b8ac8424d654fc61bf7eaa06 (patch)
tree7468e1102da5898fa1568b67acd240d07a985df5 /cortex-m-rt/src/lib.rs
parent9d63aa9e135cf319e96863f46699f3ade7f6f333 (diff)
parentebf2dd6a3414a755b7f93dfea26dc30db31a842a (diff)
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Merge #467
467: cortex-m-rt: Remove LR push, to ensure the stack is 8-byte aligned. r=adamgreig a=Dirbaio This was causing incorrect execution of code optimized with the assumption the stack is 8-byte aligned. Alternate version of #463 - Remove instead of fix the sentinel/fake frame. - Remove code initializing LR, since it's now clobbered by the `bl main` anyway. - ~~Remove the .cfi directives, since Reset now has no correct CFI info. I think this is the "correct" thing to do here.~~ - ~~Initialize the frame pointer in R7 (suggestion from `@jamesmunns)~~` Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Diffstat (limited to 'cortex-m-rt/src/lib.rs')
-rw-r--r--cortex-m-rt/src/lib.rs16
1 files changed, 1 insertions, 15 deletions
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs
index 6f72197..2070efa 100644
--- a/cortex-m-rt/src/lib.rs
+++ b/cortex-m-rt/src/lib.rs
@@ -507,12 +507,6 @@ cfg_global_asm! {
".cfi_startproc
Reset:",
- // Ensure LR is loaded with 0xFFFF_FFFF at startup to help debuggers find the first call frame.
- // On ARMv6-M LR is not initialised at all, while other platforms should initialise it.
- "movs r4, #0
- mvns r4, r4
- mov lr, r4",
-
// If enabled, initialise the SP. This is normally initialised by the CPU itself or by a
// bootloader, but some debuggers fail to set it when resetting the target, leading to
// stack corruptions.
@@ -533,9 +527,7 @@ cfg_global_asm! {
// Run user pre-init code which must be executed immediately after startup, before the
// potentially time-consuming memory initialisation takes place.
// Example use cases include disabling default watchdogs or enabling RAM.
- // Reload LR after returning from pre-init (r4 is preserved by subroutines).
- "bl __pre_init
- mov lr, r4",
+ "bl __pre_init",
// Initialise .bss memory. `__sbss` and `__ebss` come from the linker script.
"ldr r0, =__sbss
@@ -572,12 +564,6 @@ cfg_global_asm! {
dsb
isb",
- // Push `lr` to the stack for debuggers, to prevent them unwinding past Reset.
- // See https://sourceware.org/binutils/docs/as/CFI-directives.html.
- ".cfi_def_cfa sp, 0
- push {{lr}}
- .cfi_offset lr, 0",
-
// Jump to user main function.
// `bl` is used for the extended range, but the user main function should not return,
// so trap on any unexpected return.