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author | 2020-01-12 04:15:08 +0100 | |
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committer | 2020-01-12 04:15:08 +0100 | |
commit | c27910bca8f6835f843c85765fd50fa521c87f89 (patch) | |
tree | efedfe384b3cf9f43d1f2ea3dcbeb3f1068c1898 /cortex-m-rt/src | |
parent | 8b10534995d8e0285cc38339ab7495d848fe7b7f (diff) | |
download | cortex-m-c27910bca8f6835f843c85765fd50fa521c87f89.tar.gz cortex-m-c27910bca8f6835f843c85765fd50fa521c87f89.tar.zst cortex-m-c27910bca8f6835f843c85765fd50fa521c87f89.zip |
Add safety docs
Diffstat (limited to 'cortex-m-rt/src')
-rw-r--r-- | cortex-m-rt/src/lib.rs | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs index bf3a458..9697843 100644 --- a/cortex-m-rt/src/lib.rs +++ b/cortex-m-rt/src/lib.rs @@ -472,41 +472,81 @@ impl ExceptionFrame { } /// Sets the stacked value of (general purpose) register 0. + /// + /// # Safety + /// + /// This affects the `r0` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_r0(&mut self, value: u32) { self.r0 = value; } /// Sets the stacked value of (general purpose) register 1. + /// + /// # Safety + /// + /// This affects the `r1` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_r1(&mut self, value: u32) { self.r1 = value; } /// Sets the stacked value of (general purpose) register 2. + /// + /// # Safety + /// + /// This affects the `r2` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_r2(&mut self, value: u32) { self.r2 = value; } /// Sets the stacked value of (general purpose) register 3. + /// + /// # Safety + /// + /// This affects the `r3` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_r3(&mut self, value: u32) { self.r3 = value; } /// Sets the stacked value of (general purpose) register 12. + /// + /// # Safety + /// + /// This affects the `r12` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_r12(&mut self, value: u32) { self.r12 = value; } /// Sets the stacked value of the Link Register. + /// + /// # Safety + /// + /// This affects the `lr` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_lr(&mut self, value: u32) { self.lr = value; } /// Sets the stacked value of the Program Counter. + /// + /// # Safety + /// + /// This affects the `pc` register of the preempted code, which must not rely on it getting + /// restored to its previous value. pub unsafe fn set_pc(&mut self, value: u32) { self.pc = value; } /// Sets the stacked value of the Program Status Register. + /// + /// # Safety + /// + /// This affects the `xPSR` registers (`IPSR`, `APSR`, and `EPSR`) of the preempted code, which + /// must not rely on them getting restored to their previous value. pub unsafe fn set_xpsr(&mut self, value: u32) { self.xpsr = value; } |