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| author |  bors[bot] <26634292+bors[bot]@users.noreply.github.com>
| 2021-01-27 14:15:55 +0000 |
|---|---|---|
| committer |  GitHub <noreply@github.com>
| 2021-01-27 14:15:55 +0000 |
| commit | 02b308cf74bd288d63dd9b7ccda610283df099d2 (patch) | |
| tree | f4b2b1222b21ff17108caba08379d99f09efdffa /cortex-m-rt | |
| parent | 7b27817237cf22d1b92f3638d546dacf60d2a97d (diff) | |
| parent | 31fa989fb6a143597cff9290c3fd65418ae366a0 (diff) | |
| download | cortex-m-02b308cf74bd288d63dd9b7ccda610283df099d2.tar.gz cortex-m-02b308cf74bd288d63dd9b7ccda610283df099d2.tar.zst cortex-m-02b308cf74bd288d63dd9b7ccda610283df099d2.zip | |
Merge #311
311: Update changelog r=adamgreig a=jonas-schievink
Co-authored-by: Jonas Schievink <jonasschievink@gmail.com>
Diffstat (limited to 'cortex-m-rt')
| -rw-r--r-- | cortex-m-rt/CHANGELOG.md | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/cortex-m-rt/CHANGELOG.md b/cortex-m-rt/CHANGELOG.md index da03bcf..6e37e1c 100644 --- a/cortex-m-rt/CHANGELOG.md +++ b/cortex-m-rt/CHANGELOG.md @@ -7,6 +7,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +### New Features + +- Add support for CMSE secure gateway veneers ([#297]). +- Allow using the crate with custom target JSON specs ([#304]). + +[#297]: https://github.com/rust-embedded/cortex-m-rt/pull/297 +[#304]: https://github.com/rust-embedded/cortex-m-rt/pull/304 + ### Fixes - Various fixes to the linker script ([#265], [#286]). @@ -14,11 +22,16 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Add barriers after FPU enabling ([#279]). - (ARMv6-M) Set LR value to a known value on reset (as the ARM spec requires) - Added CFI and size info to external assembly subroutines (`HardFaultTrampoline` and `FpuTrampoline`) +- Allow building the crate for macOS targets ([#306], [#310]). +- Perform RAM initialization in assembly, to avoid potential UB in Rust ([#301]). [#265]: https://github.com/rust-embedded/cortex-m-rt/pull/265 [#278]: https://github.com/rust-embedded/cortex-m-rt/pull/278 [#279]: https://github.com/rust-embedded/cortex-m-rt/pull/279 [#286]: https://github.com/rust-embedded/cortex-m-rt/pull/286 +[#301]: https://github.com/rust-embedded/cortex-m-rt/pull/301 +[#306]: https://github.com/rust-embedded/cortex-m-rt/pull/306 +[#310]: https://github.com/rust-embedded/cortex-m-rt/pull/310 ### Breaking Changes @@ -27,10 +40,13 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Only allow certain attributes on handlers, and apply them to the trampoline too ([#228]). - Make it unsafe to define exception handlers for NMIs ([#289]). +- Check that exceptions exist on the target chip when registering a handler for + them ([#308]). [#239]: https://github.com/rust-embedded/cortex-m-rt/pull/239 [#228]: https://github.com/rust-embedded/cortex-m-rt/pull/228 [#289]: https://github.com/rust-embedded/cortex-m-rt/pull/289 +[#308]: https://github.com/rust-embedded/cortex-m-rt/pull/308 ## [v0.6.13] - 2020-09-07 |