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| author |  Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
| 2020-09-07 19:17:44 +0200 |
|---|---|---|
| committer | Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
| 2020-09-07 19:17:44 +0200 |
| commit | 3ee7dd938231e4aca9f9ec829c47cb2827e91701 (patch) | |
| tree | ff21a90065514e97514ec932fb00e93605b552f5 /cortex-m-rt | |
| parent | 971bd07e3ad3c3818dfdb3463a17761d51e65611 (diff) | |
| download | cortex-m-3ee7dd938231e4aca9f9ec829c47cb2827e91701.tar.gz cortex-m-3ee7dd938231e4aca9f9ec829c47cb2827e91701.tar.zst cortex-m-3ee7dd938231e4aca9f9ec829c47cb2827e91701.zip | |
update changelog
Diffstat (limited to 'cortex-m-rt')
| -rw-r--r-- | cortex-m-rt/CHANGELOG.md | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cortex-m-rt/CHANGELOG.md b/cortex-m-rt/CHANGELOG.md index e04c9c9..c39a9ae 100644 --- a/cortex-m-rt/CHANGELOG.md +++ b/cortex-m-rt/CHANGELOG.md @@ -12,6 +12,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Various fixes to the linker script ([#265], [#286]). - Use the correct ABI for the `main` symbol ([#278]). - Add barriers after FPU enabling ([#279]). +- (ARMv6-M) Set LR value to a known value on reset (as the ARM spec requires) +- Added CFI and size info to external assembly subroutines (`HardFaultTrampoline` and `FpuTrampoline`) [#265]: https://github.com/rust-embedded/cortex-m-rt/pull/265 [#278]: https://github.com/rust-embedded/cortex-m-rt/pull/278 |