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| author |  bors[bot] <bors[bot]@users.noreply.github.com>
| 2019-02-16 19:28:12 +0000 |
|---|---|---|
| committer | bors[bot] <bors[bot]@users.noreply.github.com>
| 2019-02-16 19:28:12 +0000 |
| commit | a7b9cb98e3934b195920688139a67e416cb694b5 (patch) | |
| tree | 954872e56a975ea977bed5a93ba480fbf91aaf44 /cortex-m-rt | |
| parent | 3436a113969a8723d049d384fa1983a5c988d6ff (diff) | |
| parent | 99409a20474018d2734772f8b365023ec3807081 (diff) | |
| download | cortex-m-a7b9cb98e3934b195920688139a67e416cb694b5.tar.gz cortex-m-a7b9cb98e3934b195920688139a67e416cb694b5.tar.zst cortex-m-a7b9cb98e3934b195920688139a67e416cb694b5.zip | |
Merge #168
168: On HardFault entry use MSP/PSP depending on stack mode r=thejpster a=bytex64
Noticed this when making my own hardfault handler - none of the registers were correct. The `&ExceptionFrame` argument was wrong because I was using the PSP in Thread mode, but the handler only loads MSP. This PR inspects the EXC_RETURN value in LR and loads either MSP or PSP depending on the stack used (see section B1.5.8 in the ARMv7-M architecture manual for details on the format of EXC_RETURN).
I haven't tested this on armv6m or armv8m, but I believe it works the same across the board. Also didn't update the libraries in `bin/` since I wasn't sure if that was expected or not.
Co-authored-by: Chip <bytex64@bytex64.net>
Diffstat (limited to 'cortex-m-rt')
| -rw-r--r-- | cortex-m-rt/asm.s | 9 | ||||
| -rw-r--r-- | cortex-m-rt/bin/thumbv6m-none-eabi.a | bin | 920 -> 940 bytes | |||
| -rw-r--r-- | cortex-m-rt/bin/thumbv7em-none-eabi.a | bin | 920 -> 940 bytes | |||
| -rw-r--r-- | cortex-m-rt/bin/thumbv7em-none-eabihf.a | bin | 920 -> 940 bytes | |||
| -rw-r--r-- | cortex-m-rt/bin/thumbv7m-none-eabi.a | bin | 920 -> 940 bytes | |||
| -rw-r--r-- | cortex-m-rt/bin/thumbv8m.base-none-eabi.a | bin | 924 -> 944 bytes |
6 files changed, 9 insertions, 0 deletions
diff --git a/cortex-m-rt/asm.s b/cortex-m-rt/asm.s index 1f0e74d..50a3fa5 100644 --- a/cortex-m-rt/asm.s +++ b/cortex-m-rt/asm.s @@ -6,5 +6,14 @@ .type HardFaultTrampoline,%function .thumb_func HardFaultTrampoline: + # depending on the stack mode in EXC_RETURN, fetch stack pointer from + # PSP or MSP + mov r0, lr + mov r1, #4 + tst r0, r1 + bne 0f mrs r0, MSP b HardFault +0: + mrs r0, PSP + b HardFault diff --git a/cortex-m-rt/bin/thumbv6m-none-eabi.a b/cortex-m-rt/bin/thumbv6m-none-eabi.a Binary files differindex 5938e99..6a6a547 100644 --- a/cortex-m-rt/bin/thumbv6m-none-eabi.a +++ b/cortex-m-rt/bin/thumbv6m-none-eabi.a diff --git a/cortex-m-rt/bin/thumbv7em-none-eabi.a b/cortex-m-rt/bin/thumbv7em-none-eabi.a Binary files differindex fc426f9..51d9aef 100644 --- a/cortex-m-rt/bin/thumbv7em-none-eabi.a +++ b/cortex-m-rt/bin/thumbv7em-none-eabi.a diff --git a/cortex-m-rt/bin/thumbv7em-none-eabihf.a b/cortex-m-rt/bin/thumbv7em-none-eabihf.a Binary files differindex fc426f9..51d9aef 100644 --- a/cortex-m-rt/bin/thumbv7em-none-eabihf.a +++ b/cortex-m-rt/bin/thumbv7em-none-eabihf.a diff --git a/cortex-m-rt/bin/thumbv7m-none-eabi.a b/cortex-m-rt/bin/thumbv7m-none-eabi.a Binary files differindex 3359875..dc37fbf 100644 --- a/cortex-m-rt/bin/thumbv7m-none-eabi.a +++ b/cortex-m-rt/bin/thumbv7m-none-eabi.a diff --git a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a b/cortex-m-rt/bin/thumbv8m.base-none-eabi.a Binary files differindex 0637387..dda8dcc 100644 --- a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a +++ b/cortex-m-rt/bin/thumbv8m.base-none-eabi.a |