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author | 2022-01-21 01:45:29 +0000 | |
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committer | 2022-01-21 18:16:04 +0000 | |
commit | a25cb3eabc223be5a4208db9f857f9c849eb057e (patch) | |
tree | 14fa9334362ed273b91a5de86ed608bf8d2f70fd /cortex-m-semihosting/src/lib.rs | |
parent | 27434e0ce0b67abdd06c1a1b9a7b5ea9121d039e (diff) | |
download | cortex-m-a25cb3eabc223be5a4208db9f857f9c849eb057e.tar.gz cortex-m-a25cb3eabc223be5a4208db9f857f9c849eb057e.tar.zst cortex-m-a25cb3eabc223be5a4208db9f857f9c849eb057e.zip |
Fix cortex-m-semihosting inline-asm on nightly
Diffstat (limited to 'cortex-m-semihosting/src/lib.rs')
-rw-r--r-- | cortex-m-semihosting/src/lib.rs | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/cortex-m-semihosting/src/lib.rs b/cortex-m-semihosting/src/lib.rs index a67b84d..3bc23ea 100644 --- a/cortex-m-semihosting/src/lib.rs +++ b/cortex-m-semihosting/src/lib.rs @@ -153,7 +153,7 @@ //! //! ## `inline-asm` //! -//! When this feature is enabled semihosting is implemented using inline assembly (`llvm_asm!`) and +//! When this feature is enabled semihosting is implemented using inline assembly and //! compiling this crate requires nightly. //! //! When this feature is disabled semihosting is implemented using FFI calls into an external @@ -179,7 +179,6 @@ //! //! [pdf]: http://infocenter.arm.com/help/topic/com.arm.doc.dui0471e/DUI0471E_developing_for_arm_processors.pdf -#![cfg_attr(feature = "inline-asm", feature(llvm_asm))] #![deny(missing_docs)] #![no_std] @@ -213,7 +212,12 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize { #[cfg(all(thumb, feature = "inline-asm", not(feature = "no-semihosting")))] () => { let mut nr = _nr; - llvm_asm!("bkpt 0xAB" : "+{r0}"(nr) : "{r1}"(_arg) :: "volatile"); + core::arch::asm!( + "bkpt #0xab", + inout("r0") nr, + in("r1") _arg, + options(nomem, nostack, preserves_flags) + ); nr } |