inline all the functions in the asm module

1 files changed, 6 insertions, 0 deletions

diff --git a/src/asm.rs b/src/asm.rs
index cb4254e..daa7b55 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -18,6 +18,7 @@ pub fn bkpt() {
 }
 
 /// A no-operation. Useful to prevent delay loops from being optimized away.
+#[inline(always)]
 pub fn nop() {
     unsafe {
         asm!("nop"
@@ -28,6 +29,7 @@ pub fn nop() {
     }
 }
 /// Wait For Event
+#[inline(always)]
 pub fn wfe() {
     match () {
         #[cfg(target_arch = "arm")]
@@ -44,6 +46,7 @@ pub fn wfe() {
 }
 
 /// Wait For Interrupt
+#[inline(always)]
 pub fn wfi() {
     match () {
         #[cfg(target_arch = "arm")]
@@ -63,6 +66,7 @@ pub fn wfi() {
 ///
 /// Flushes the pipeline in the processor, so that all instructions following the `ISB` are fetched
 /// from cache or memory, after the instruction has been completed.
+#[inline(always)]
 pub fn isb() {
     match () {
         #[cfg(target_arch = "arm")]
@@ -82,6 +86,7 @@ pub fn isb() {
 ///
 ///  * any explicit memory access made before this instruction is complete
 ///  * all cache and branch predictor maintenance operations before this instruction complete
+#[inline(always)]
 pub fn dsb() {
     match () {
         #[cfg(target_arch = "arm")]
@@ -98,6 +103,7 @@ pub fn dsb() {
 /// Ensures that all explicit memory accesses that appear in program order before the `DMB`
 /// instruction are observed before any explicit memory accesses that appear in program order
 /// after the `DMB` instruction.
+#[inline(always)]
 pub fn dmb() {
     match () {
         #[cfg(target_arch = "arm")]