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| author |  bors[bot] <bors[bot]@users.noreply.github.com>
| 2019-03-12 21:29:39 +0000 |
|---|---|---|
| committer | bors[bot] <bors[bot]@users.noreply.github.com>
| 2019-03-12 21:29:39 +0000 |
| commit | 3b574e88fb15d704b9c2dacbf643f7ca0fa706ca (patch) | |
| tree | b82cdea518f1b2eabd6431075de48aa6926bef35 /src/interrupt.rs | |
| parent | ac5f677f575847c428767ee553fbd0289794262d (diff) | |
| parent | 712aa294833012ee2f4d2ad4a065c6fba26873ed (diff) | |
| download | cortex-m-3b574e88fb15d704b9c2dacbf643f7ca0fa706ca.tar.gz cortex-m-3b574e88fb15d704b9c2dacbf643f7ca0fa706ca.tar.zst cortex-m-3b574e88fb15d704b9c2dacbf643f7ca0fa706ca.zip | |
Merge #127
127: Cortex M0(+) DWT fixes r=adamgreig a=korken89
The current DWT setup has a lot of registers that are not available in Cortex-M0(+), fixes are added here.
Co-authored-by: Emil Fresk <emil.fresk@gmail.com>
Diffstat (limited to 'src/interrupt.rs')
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