Merge #88

88: make compilable on stable r=japaric a=japaric

This PR makes this crate compilable on stable when the "inline-asm" and "singleton" Cargo features
are disabled (they are enabled by default to maintain backwards compatibility).

The main change has been replacing almost (\*) all inline `asm!` invocations with FFI calls into
external assembly files.

(\*) Stuff that has not been converted into external assembly file and thus is not available on
stable:

- Reading the (A)PSR register (I'm not sure if this will work with the extra function call overhead)

- Reading and writing the Link Register (LR)

- Reading and writing the Program Counter (PC)

I would appreciate if someone checked that all the stuff that's now using FFI calls has the same
semantics as the inline `asm!` version.


Co-authored-by: Jorge Aparicio <jorge@japaric.io>

1 files changed, 28 insertions, 4 deletions

diff --git a/src/interrupt.rs b/src/interrupt.rs
index 5880dd4..b57cc80 100644
--- a/src/interrupt.rs
+++ b/src/interrupt.rs
@@ -1,16 +1,29 @@
 //! Interrupts
 
+// use core::sync::atomic::{self, Ordering};
+
 pub use bare_metal::{CriticalSection, Mutex, Nr};
 
 /// Disables all interrupts
 #[inline]
 pub fn disable() {
     match () {
-        #[cfg(target_arch = "arm")]
+        #[cfg(all(cortex_m, feature = "inline-asm"))]
         () => unsafe {
             asm!("cpsid i" ::: "memory" : "volatile");
         },
-        #[cfg(not(target_arch = "arm"))]
+
+        #[cfg(all(cortex_m, not(feature = "inline-asm")))]
+        () => unsafe {
+            extern "C" {
+                fn __cpsid();
+            }
+
+            // XXX do we need a explicit compiler barrier here?
+            __cpsid();
+        },
+
+        #[cfg(not(cortex_m))]
         () => unimplemented!(),
     }
 }
@@ -23,9 +36,20 @@ pub fn disable() {
 #[inline]
 pub unsafe fn enable() {
     match () {
-        #[cfg(target_arch = "arm")]
+        #[cfg(all(cortex_m, feature = "inline-asm"))]
         () => asm!("cpsie i" ::: "memory" : "volatile"),
-        #[cfg(not(target_arch = "arm"))]
+
+        #[cfg(all(cortex_m, not(feature = "inline-asm")))]
+        () => {
+            extern "C" {
+                fn __cpsie();
+            }
+
+            // XXX do we need a explicit compiler barrier here?
+            __cpsie();
+        }
+
+        #[cfg(not(cortex_m))]
         () => unimplemented!(),
     }
 }