Merge pull request #17 from japaric/ng

v0.2.0

1 files changed, 20 insertions, 84 deletions

diff --git a/src/lib.rs b/src/lib.rs
index 09eeceb..95a1b69 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,104 +1,40 @@
 //! Low level access to Cortex-M processors
 //!
-//! This crate provides access to:
+//! This crate provides:
 //!
-//! - Core peripherals like NVIC, SCB and SysTick.
-//! - Core registers like CONTROL, MSP and PSR.
+//! - Access to core peripherals like NVIC, SCB and SysTick.
+//! - Access to core registers like CONTROL, MSP and PSR.
 //! - Interrupt manipulation mechanisms
 //! - Data structures like the vector table
-//! - Miscellaneous assembly instructions like `bkpt`
-//!
+//! - Safe wrappers around assembly instructions like `bkpt`
 
+#![cfg_attr(target_arch = "arm", feature(core_intrinsics))]
 #![deny(missing_docs)]
 #![deny(warnings)]
 #![feature(asm)]
 #![feature(const_fn)]
+#![feature(naked_functions)]
 #![no_std]
 
+pub extern crate cortex_m_semihosting as semihosting;
 extern crate volatile_register;
 
+#[macro_use]
+mod macros;
+
+#[macro_use]
 pub mod asm;
+pub mod ctxt;
+pub mod exception;
 pub mod interrupt;
+pub mod itm;
 pub mod peripheral;
 pub mod register;
 
-mod exception;
-
-pub use exception::Exception;
-
-/// Stack frame
-#[repr(C)]
-pub struct StackFrame {
-    /// (General purpose) Register 0
-    pub r0: u32,
-    /// (General purpose) Register 1
-    pub r1: u32,
-    /// (General purpose) Register 2
-    pub r2: u32,
-    /// (General purpose) Register 3
-    pub r3: u32,
-    /// (General purpose) Register 12
-    pub r12: u32,
-    /// Linker Register
-    pub lr: u32,
-    /// Program Counter
-    pub pc: u32,
-    /// Program Status Register
-    pub xpsr: u32,
-}
-
-/// Vector Table
-///
-/// # References
-///
-/// - ARMv7-M Architecture Reference Manual (issue E.b) - Section B1.5 - ARMv7-M exception model
-#[repr(C)]
-pub struct VectorTable {
-    /// Reset value of the Main Stack Pointer (MSP)
-    pub sp_main: &'static (),
-    /// Reset
-    pub reset: extern "C" fn() -> !,
-    /// Non Maskable Interrupt
-    pub nmi: Option<Handler>,
-    /// Hard Fault
-    pub hard_fault: Option<Handler>,
-    /// Memory Management
-    pub mem_manage: Option<Handler>,
-    /// Bus Fault
-    pub bus_fault: Option<Handler>,
-    /// Usage Fault
-    pub usage_fault: Option<Handler>,
-    reserved0: [u32; 4],
-    /// Supervisor Call
-    pub svcall: Option<Handler>,
-    /// Debug Monitor
-    pub debug_monitor: Option<Handler>,
-    reserved1: u32,
-    /// PendSV
-    pub pendsv: Option<Handler>,
-    /// SysTick
-    pub sys_tick: Option<Handler>,
-    /// Interrupts. An IMPLEMENTATION DEFINED number of them.
-    pub interrupts: [Option<Handler>; 0],
-}
-
-/// Returns the vector table
-pub fn vector_table() -> &'static VectorTable {
-    unsafe { deref(peripheral::scb().vtor.read() as usize) }
-}
-
-/// Exception/Interrupt Handler
-pub type Handler = unsafe extern "C" fn();
-
-#[cfg(test)]
-fn address<T>(r: &T) -> usize {
-    r as *const T as usize
-}
-
-unsafe fn deref<T>(a: usize) -> &'static T {
-    &*(a as *const T)
-}
-
-unsafe fn deref_mut<T>(a: usize) -> &'static mut T {
-    &mut *(a as *mut T)
+/// A reserved spot in the vector table
+#[derive(Clone, Copy)]
+#[repr(u32)]
+pub enum Reserved {
+    /// Reserved
+    Vector = 0,
 }