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| author |  bors[bot] <26634292+bors[bot]@users.noreply.github.com>
| 2020-04-15 10:08:25 +0000 |
|---|---|---|
| committer |  GitHub <noreply@github.com>
| 2020-04-15 10:08:25 +0000 |
| commit | e41b27331c70865b89b5584b13c0b469de30daff (patch) | |
| tree | e796f24370f3ab75fcd542500e095a9501dff85d /src/peripheral/cbp.rs | |
| parent | f2a56ec9022ccf88186e125234e4e21fc585b8a8 (diff) | |
| parent | 9c1a46749c4a2f7b88581a69cd405b712d227343 (diff) | |
| download | cortex-m-e41b27331c70865b89b5584b13c0b469de30daff.tar.gz cortex-m-e41b27331c70865b89b5584b13c0b469de30daff.tar.zst cortex-m-e41b27331c70865b89b5584b13c0b469de30daff.zip | |
Merge #181
181: Add cfg to Peripheral fields r=thejpster a=hug-dev
The cfg conditional compilation attribute was only set on impl blocks of peripherals. This commit also sets it on the fields themselves to be more consistent.
Also adds Armv8-M Baseline to the blacklist of the ITM peripheral (cf rule `FMQF` of the Armv8-M ARM).
Co-authored-by: Hugues de Valon <hugues.devalon@arm.com>
Diffstat (limited to 'src/peripheral/cbp.rs')
| -rw-r--r-- | src/peripheral/cbp.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/peripheral/cbp.rs b/src/peripheral/cbp.rs index 6a1defd..5aee544 100644 --- a/src/peripheral/cbp.rs +++ b/src/peripheral/cbp.rs @@ -1,6 +1,6 @@ //! Cache and branch predictor maintenance operations //! -//! *NOTE* Available only on ARMv7-M (`thumbv7*m-none-eabi*`) +//! *NOTE* Not available on Armv6-M. use volatile_register::WO; |