aboutsummaryrefslogtreecommitdiff
path: root/src/peripheral/cpuid.rs
diff options
context:
space:
mode:
authorGravatar Jonas Schievink <jonasschievink@gmail.com> 2021-01-07 18:46:53 +0100
committerGravatar Jonas Schievink <jonasschievink@gmail.com> 2021-01-07 18:53:02 +0100
commitc828dd95e8e15be90ecdaa15193bb73ece781536 (patch)
tree00a77154b04ff60277ad470bd182644d2499f87b /src/peripheral/cpuid.rs
parent126165331e14f92809656a76dfa351e42dfa1a68 (diff)
downloadcortex-m-c828dd95e8e15be90ecdaa15193bb73ece781536.tar.gz
cortex-m-c828dd95e8e15be90ecdaa15193bb73ece781536.tar.zst
cortex-m-c828dd95e8e15be90ecdaa15193bb73ece781536.zip
Remove excessive missing_inline_in_public_items
Diffstat (limited to 'src/peripheral/cpuid.rs')
-rw-r--r--src/peripheral/cpuid.rs1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/peripheral/cpuid.rs b/src/peripheral/cpuid.rs
index 32d0baf..ad2b6e6 100644
--- a/src/peripheral/cpuid.rs
+++ b/src/peripheral/cpuid.rs
@@ -66,7 +66,6 @@ pub struct RegisterBlock {
/// Type of cache to select on CSSELR writes.
#[cfg(not(armv6m))]
-#[allow(clippy::missing_inline_in_public_items)]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum CsselrCacheType {
/// Select DCache or unified cache