diff options
| author |  bors[bot] <26634292+bors[bot]@users.noreply.github.com>
| 2021-11-27 12:43:40 +0000 |
|---|---|---|
| committer |  GitHub <noreply@github.com>
| 2021-11-27 12:43:40 +0000 |
| commit | ae1d2a62d895dc458784c465e021a010cb75a8b1 (patch) | |
| tree | 97fc7bc0b18b1051d48faa93c153de25a6b29f56 /src/peripheral/dcb.rs | |
| parent | 4b536898ca8da6d20bd54d91fd7938aae0c538bf (diff) | |
| parent | c1d434a7e7ee1a04ce06c3e3bcdb9b65e048b8ba (diff) | |
| download | cortex-m-ae1d2a62d895dc458784c465e021a010cb75a8b1.tar.gz cortex-m-ae1d2a62d895dc458784c465e021a010cb75a8b1.tar.zst cortex-m-ae1d2a62d895dc458784c465e021a010cb75a8b1.zip | |
Merge #342
342: Implement various interfaces for trace configuration r=adamgreig a=tmplt
I'm working on tracing support and aim to implement functions that abstract the configuration of relevant peripherals. Of chief interest is `DWT`, `ITM` and `TPIU`. Some propored abstractions will go against what is established in the crate; I will ask for comments on these.
Co-authored-by: Viktor Sonesten <v@tmplt.dev>
Diffstat (limited to 'src/peripheral/dcb.rs')
| -rw-r--r-- | src/peripheral/dcb.rs | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs index 5689cb4..056150b 100644 --- a/src/peripheral/dcb.rs +++ b/src/peripheral/dcb.rs @@ -25,6 +25,10 @@ impl DCB { /// `peripheral::DWT` cycle counter to work properly. /// As by STM documentation, this flag is not reset on /// soft-reset, only on power reset. + /// + /// Note: vendor-specific registers may have to be set to completely + /// enable tracing. For example, on the STM32F401RE, `TRACE_MODE` + /// and `TRACE_IOEN` must be configured in `DBGMCU_CR` register. #[inline] pub fn enable_trace(&mut self) { // set bit 24 / TRCENA |